Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/67348 )
Change subject: src: remove force-included header rules.h from individual files ......................................................................
src: remove force-included header rules.h from individual files
The header file `rules.h` is automatically included in the build by the top level makefile using the command: `-include src/soc/intel/common/block/scs/early_mmc.c`.
Similar to `config.h` and 'kconfig.h`, this file does not need to be included manually, so remove it.
Signed-off-by: Martin Roth gaumless@gmail.com Change-Id: I23a1876b4b671d8565cf9b391d3babf800c074db Reviewed-on: https://review.coreboot.org/c/coreboot/+/67348 Reviewed-by: Elyes Haouas ehaouas@noos.fr Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/arch/arm/armv7/cpu.S M src/arch/arm/include/arch/header.ld M src/arch/arm64/include/arch/header.ld M src/arch/riscv/include/arch/header.ld M src/arch/x86/assembly_entry.S M src/arch/x86/include/arch/header.ld M src/include/cbfs_glue.h M src/soc/intel/common/block/cpu/car/cache_as_ram.S M src/soc/nvidia/tegra210/memlayout.ld 9 files changed, 20 insertions(+), 14 deletions(-)
Approvals: build bot (Jenkins): Verified Elyes Haouas: Looks good to me, approved
diff --git a/src/arch/arm/armv7/cpu.S b/src/arch/arm/armv7/cpu.S index bc3ebd9..3459fc6 100644 --- a/src/arch/arm/armv7/cpu.S +++ b/src/arch/arm/armv7/cpu.S @@ -6,7 +6,6 @@ */
#include <arch/asm.h> -#include <rules.h>
/* * Dcache invalidations by set/way work by passing a [way:sbz:set:sbz:level:0] diff --git a/src/arch/arm/include/arch/header.ld b/src/arch/arm/include/arch/header.ld index cb69ba3..b1e1f9d 100644 --- a/src/arch/arm/include/arch/header.ld +++ b/src/arch/arm/include/arch/header.ld @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <rules.h> - /* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") OUTPUT_ARCH(arm) diff --git a/src/arch/arm64/include/arch/header.ld b/src/arch/arm64/include/arch/header.ld index 4f37176..c6d48e7 100644 --- a/src/arch/arm64/include/arch/header.ld +++ b/src/arch/arm64/include/arch/header.ld @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <rules.h> - /* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_FORMAT("elf64-littleaarch64", "elf64-littleaarch64", "elf64-littleaarch64") OUTPUT_ARCH(aarch64) diff --git a/src/arch/riscv/include/arch/header.ld b/src/arch/riscv/include/arch/header.ld index d814772..ddb618c 100644 --- a/src/arch/riscv/include/arch/header.ld +++ b/src/arch/riscv/include/arch/header.ld @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <rules.h> - /* We use ELF as output format. So that we can debug the code in some form. */ OUTPUT_ARCH(riscv)
diff --git a/src/arch/x86/assembly_entry.S b/src/arch/x86/assembly_entry.S index 6e73027..79d6e19 100644 --- a/src/arch/x86/assembly_entry.S +++ b/src/arch/x86/assembly_entry.S @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <rules.h> - /* * This path is for stages that are post bootblock. The gdt is reloaded * to accommodate platforms that are executing out of CAR. In order to diff --git a/src/arch/x86/include/arch/header.ld b/src/arch/x86/include/arch/header.ld index 4e78ae7..5b380fa 100644 --- a/src/arch/x86/include/arch/header.ld +++ b/src/arch/x86/include/arch/header.ld @@ -1,7 +1,5 @@ /* SPDX-License-Identifier: GPL-2.0-only */
-#include <rules.h> - PHDRS { to_load PT_LOAD; diff --git a/src/include/cbfs_glue.h b/src/include/cbfs_glue.h index 652cf1b..d4fe367 100644 --- a/src/include/cbfs_glue.h +++ b/src/include/cbfs_glue.h @@ -6,7 +6,6 @@ #include <commonlib/region.h> #include <console/console.h> #include <security/vboot/misc.h> -#include <rules.h>
/* * This flag prevents linking hashing functions into stages where they're not required. We don't diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram.S b/src/soc/intel/common/block/cpu/car/cache_as_ram.S index 1c905a4..552ba15 100644 --- a/src/soc/intel/common/block/cpu/car/cache_as_ram.S +++ b/src/soc/intel/common/block/cpu/car/cache_as_ram.S @@ -7,7 +7,6 @@ #include <cpu/x86/msr.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/post_code.h> -#include <rules.h> #include <intelblocks/msr.h>
.section .init, "ax", @progbits diff --git a/src/soc/nvidia/tegra210/memlayout.ld b/src/soc/nvidia/tegra210/memlayout.ld index 42f2164..d9d7070 100644 --- a/src/soc/nvidia/tegra210/memlayout.ld +++ b/src/soc/nvidia/tegra210/memlayout.ld @@ -1,7 +1,6 @@ /* SPDX-License-Identifier: GPL-2.0-only */
#include <memlayout.h> -#include <rules.h>
#include <arch/header.ld>