Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49301 )
Change subject: soc/intel/alderlake: Add PCH ID 0x5182 ......................................................................
soc/intel/alderlake: Add PCH ID 0x5182
TEST=Able to build and boot ADLRVP.
Change-Id: Ia331998b46abcf10e939078dea992589f09139bd Signed-off-by: Subrata Banik subrata.banik@intel.com --- M src/include/device/pci_ids.h M src/soc/intel/alderlake/bootblock/report_platform.c M src/soc/intel/common/block/lpc/lpc.c 3 files changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/49301/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 8ac29c5..0b78c9f 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2959,6 +2959,7 @@ #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30 0x7a1e #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31 0x7a1f #define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32 0x5181 +#define PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33 0x5182 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_0 0x7a80 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_1 0x7a81 #define PCI_DEVICE_ID_INTEL_ADP_S_ESPI_2 0x7a82 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index f0d8f2b..8cc81c1 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -79,6 +79,7 @@ { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_30, "Alderlake-P SKU" }, { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_31, "Alderlake-P SKU" }, { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, "Alderlake-P SKU" }, + { PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33, "Alderlake-P SKU" }, };
static struct { diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 369b6b1..af8331e 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -306,6 +306,7 @@ PCI_DEVICE_ID_INTEL_ADP_S_ESPI_30, PCI_DEVICE_ID_INTEL_ADP_S_ESPI_31, PCI_DEVICE_ID_INTEL_ADP_P_ESPI_32, + PCI_DEVICE_ID_INTEL_ADP_P_ESPI_33, 0 };