Patch set updated for coreboot: ed6e901 Intel 945 boards: romstage.c: Use define for `BSM`

[Paul Menzel]

Paul Menzel ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5929

-gerrit

commit ed6e901e3b3e7a305ce4467cf5c38033218df3a2
Author: Paul Menzel 
Date:   Thu Jun 5 08:50:17 2014 +0200

Intel 945 boards: romstage.c: Use define for `BSM`

Change-Id: Ia58d8b410a145f27f0b267c115714580c366e063
    Signed-off-by: Paul Menzel 
---
 src/mainboard/getac/p470/romstage.c       | 2 +-
 src/mainboard/ibase/mb899/romstage.c      | 2 +-
 src/mainboard/intel/d945gclf/romstage.c   | 2 +-
 src/mainboard/kontron/986lcd-m/romstage.c | 2 +-
 src/mainboard/lenovo/t60/romstage.c       | 2 +-
 src/mainboard/lenovo/x60/romstage.c       | 2 +-
 src/mainboard/roda/rk886ex/romstage.c     | 2 +-
 7 files changed, 7 insertions(+), 7 deletions(-)

diff --git a/src/mainboard/getac/p470/romstage.c b/src/mainboard/getac/p470/romstage.c
index a081a8a..33b6726 100644
--- a/src/mainboard/getac/p470/romstage.c
+++ b/src/mainboard/getac/p470/romstage.c
@@ -347,7 +347,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/ibase/mb899/romstage.c b/src/mainboard/ibase/mb899/romstage.c
index 418b6e4..9dfd364 100644
--- a/src/mainboard/ibase/mb899/romstage.c
+++ b/src/mainboard/ibase/mb899/romstage.c
@@ -298,7 +298,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/intel/d945gclf/romstage.c b/src/mainboard/intel/d945gclf/romstage.c
index 69d4232..a0621ce 100644
--- a/src/mainboard/intel/d945gclf/romstage.c
+++ b/src/mainboard/intel/d945gclf/romstage.c
@@ -258,7 +258,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/kontron/986lcd-m/romstage.c b/src/mainboard/kontron/986lcd-m/romstage.c
index 4acd734..0ad7a2a 100644
--- a/src/mainboard/kontron/986lcd-m/romstage.c
+++ b/src/mainboard/kontron/986lcd-m/romstage.c
@@ -410,7 +410,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/lenovo/t60/romstage.c b/src/mainboard/lenovo/t60/romstage.c
index dae917c..c5bb2f3 100644
--- a/src/mainboard/lenovo/t60/romstage.c
+++ b/src/mainboard/lenovo/t60/romstage.c
@@ -309,7 +309,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/lenovo/x60/romstage.c b/src/mainboard/lenovo/x60/romstage.c
index 1198fb2..1fed5f5 100644
--- a/src/mainboard/lenovo/x60/romstage.c
+++ b/src/mainboard/lenovo/x60/romstage.c
@@ -311,7 +311,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0, 2, 0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0, 2, 0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);
diff --git a/src/mainboard/roda/rk886ex/romstage.c b/src/mainboard/roda/rk886ex/romstage.c
index ad323f5..2af294c 100644
--- a/src/mainboard/roda/rk886ex/romstage.c
+++ b/src/mainboard/roda/rk886ex/romstage.c
@@ -334,7 +334,7 @@ void main(unsigned long bist)

{
    	/* This will not work if TSEG is in place! */
-		u32 tom = pci_read_config32(PCI_DEV(0,2,0), 0x5c);
+		u32 tom = pci_read_config32(PCI_DEV(0,2,0), BSM);

printk(BIOS_DEBUG, "TOM: 0x%08x\n", tom);
    	ram_check(0x00000000, 0x000a0000);