Change in coreboot[master]: src/soc/intel/braswell/acpi/southcluster.asl: Remove disabled LPE dev...

[Frans Hendriks (Code Review)]

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/29414

Change subject: src/soc/intel/braswell/acpi/southcluster.asl: Remove disabled LPE devices
......................................................................

src/soc/intel/braswell/acpi/southcluster.asl: Remove disabled LPE devices

ACPI code for LPE devices is enabled, but devices are disabled.
Remove the LPE devices when these are disabled.

BUG=N/A
TEST=Intel CherryHill CRB

Change-Id: Ic8acf9ea9e9b0ba9b272e20beb2023b7a4716a73
Signed-off-by: Frans Hendriks 
---
M src/soc/intel/braswell/Kconfig
M src/soc/intel/braswell/acpi/southcluster.asl
2 files changed, 9 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/29414/1

diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig
index 2ba7992..6e3adcd 100644
--- a/src/soc/intel/braswell/Kconfig
+++ b/src/soc/intel/braswell/Kconfig
@@ -127,4 +127,10 @@
    string
    default "soc/intel/braswell/bootblock/timestamp.inc"

+config ENABLE_LPE_DEVICES
+	bool "Include ASL code for LPE devices"
+	default y
+	help
+		Enable this if the LPE interfaces are supported
+
 endif
diff --git a/src/soc/intel/braswell/acpi/southcluster.asl b/src/soc/intel/braswell/acpi/southcluster.asl
index f7e3168..7ec8c54 100644
--- a/src/soc/intel/braswell/acpi/southcluster.asl
+++ b/src/soc/intel/braswell/acpi/southcluster.asl
@@ -2,6 +2,7 @@
  * This file is part of the coreboot project.
  *
  * Copyright (C) 2013 Google Inc.
+ * Copyright (C) 2018 Eltan B.V.
  *
  * This program is free software; you can redistribute it and/or
  * modify it under the terms of the GNU General Public License as
@@ -287,6 +288,8 @@
    /* SCC Devices */
    #include "scc.asl"

+#if IS_ENABLED(CONFIG_ENABLE_LPE_DEVICES)
    /* LPE Device */
    #include "lpe.asl"
+#endif
 }