Hello Weiyi Lu,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/45393
to review the following change.
Change subject: soc/mediatek: move power status bits under each chip ......................................................................
soc/mediatek: move power status bits under each chip
The power status bits of display and audio of MT8192 are different from the bits of MT8173 & MT8183, so move those under each chip.
Signed-off-by: Weiyi Lu weiyi.lu@mediatek.com Change-Id: Iaa211b8db733d8aa52d93af9e507042bf0984d55 --- M src/soc/mediatek/common/mtcmos.c M src/soc/mediatek/mt8173/include/soc/spm.h M src/soc/mediatek/mt8183/include/soc/spm.h 3 files changed, 4 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/45393/1
diff --git a/src/soc/mediatek/common/mtcmos.c b/src/soc/mediatek/common/mtcmos.c index cbec250..cfd148c 100644 --- a/src/soc/mediatek/common/mtcmos.c +++ b/src/soc/mediatek/common/mtcmos.c @@ -21,11 +21,6 @@ PWR_RST_B = 1U << 0 };
-enum { - DISP_PWR_STA_MASK = 0x1 << 3, - AUDIO_PWR_STA_MASK = 0x1 << 24, -}; - static void mtcmos_power_on(const struct power_domain_data *pd) { write32(&mtk_spm->poweron_config_set, diff --git a/src/soc/mediatek/mt8173/include/soc/spm.h b/src/soc/mediatek/mt8173/include/soc/spm.h index 0d8e0d3..efc04d1 100644 --- a/src/soc/mediatek/mt8173/include/soc/spm.h +++ b/src/soc/mediatek/mt8173/include/soc/spm.h @@ -11,8 +11,10 @@ };
enum { + DISP_PWR_STA_MASK = 0x1 << 3, DISP_SRAM_PDN_MASK = 0xf << 8, DISP_SRAM_ACK_MASK = 0x1 << 12, + AUDIO_PWR_STA_MASK = 0x1 << 24, AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_ACK_MASK = 0xf << 12, }; diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h index fa6d6d0..327355a 100644 --- a/src/soc/mediatek/mt8183/include/soc/spm.h +++ b/src/soc/mediatek/mt8183/include/soc/spm.h @@ -117,8 +117,10 @@ #define PCM_SW_INT_ALL (0x3FF)
enum { + DISP_PWR_STA_MASK = 0x1 << 3, DISP_SRAM_PDN_MASK = 0x1 << 8, DISP_SRAM_ACK_MASK = 0x1 << 12, + AUDIO_PWR_STA_MASK = 0x1 << 24, AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_ACK_MASK = 0xf << 12, };
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45393 )
Change subject: soc/mediatek: move power status bits under each chip ......................................................................
Patch Set 1: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45393 )
Change subject: soc/mediatek: move power status bits under each chip ......................................................................
Patch Set 1: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45393 )
Change subject: soc/mediatek: move power status bits under each chip ......................................................................
soc/mediatek: move power status bits under each chip
The power status bits of display and audio of MT8192 are different from the bits of MT8173 & MT8183, so move those under each chip.
Signed-off-by: Weiyi Lu weiyi.lu@mediatek.com Change-Id: Iaa211b8db733d8aa52d93af9e507042bf0984d55 Reviewed-on: https://review.coreboot.org/c/coreboot/+/45393 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/common/mtcmos.c M src/soc/mediatek/mt8173/include/soc/spm.h M src/soc/mediatek/mt8183/include/soc/spm.h 3 files changed, 4 insertions(+), 5 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/common/mtcmos.c b/src/soc/mediatek/common/mtcmos.c index cbec250..cfd148c 100644 --- a/src/soc/mediatek/common/mtcmos.c +++ b/src/soc/mediatek/common/mtcmos.c @@ -21,11 +21,6 @@ PWR_RST_B = 1U << 0 };
-enum { - DISP_PWR_STA_MASK = 0x1 << 3, - AUDIO_PWR_STA_MASK = 0x1 << 24, -}; - static void mtcmos_power_on(const struct power_domain_data *pd) { write32(&mtk_spm->poweron_config_set, diff --git a/src/soc/mediatek/mt8173/include/soc/spm.h b/src/soc/mediatek/mt8173/include/soc/spm.h index 0d8e0d3..efc04d1 100644 --- a/src/soc/mediatek/mt8173/include/soc/spm.h +++ b/src/soc/mediatek/mt8173/include/soc/spm.h @@ -11,8 +11,10 @@ };
enum { + DISP_PWR_STA_MASK = 0x1 << 3, DISP_SRAM_PDN_MASK = 0xf << 8, DISP_SRAM_ACK_MASK = 0x1 << 12, + AUDIO_PWR_STA_MASK = 0x1 << 24, AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_ACK_MASK = 0xf << 12, }; diff --git a/src/soc/mediatek/mt8183/include/soc/spm.h b/src/soc/mediatek/mt8183/include/soc/spm.h index fa6d6d0..327355a 100644 --- a/src/soc/mediatek/mt8183/include/soc/spm.h +++ b/src/soc/mediatek/mt8183/include/soc/spm.h @@ -117,8 +117,10 @@ #define PCM_SW_INT_ALL (0x3FF)
enum { + DISP_PWR_STA_MASK = 0x1 << 3, DISP_SRAM_PDN_MASK = 0x1 << 8, DISP_SRAM_ACK_MASK = 0x1 << 12, + AUDIO_PWR_STA_MASK = 0x1 << 24, AUDIO_SRAM_PDN_MASK = 0xf << 8, AUDIO_SRAM_ACK_MASK = 0xf << 12, };
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45393 )
Change subject: soc/mediatek: move power status bits under each chip ......................................................................
Patch Set 2:
Automatic boot test returned (PASS/FAIL/TOTAL): 8/1/9 "QEMU x86 q35/ich9" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19560 "QEMU x86 q35/ich9" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19559 "QEMU x86 i440fx/piix4" (x86_64) using payload SeaBIOS : FAIL : https://lava.9esec.io/r/19558 "QEMU x86 i440fx/piix4" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19557 "QEMU AArch64" using payload LinuxBoot_u-root_kexec : SUCCESS : https://lava.9esec.io/r/19556 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19564 "HP Z220 SFF Workstation" (x86_32) using payload LinuxBoot_BusyBox_kexec : SUCCESS : https://lava.9esec.io/r/19563 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload TianoCore : SUCCESS : https://lava.9esec.io/r/19562 "HP Compaq 8200 Elite SFF PC" (x86_32) using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/19561
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
CK HU (Code Review)
-
Hung-Te Lin (Code Review)
-
Yu-Ping Wu (Code Review)