Change in coreboot[master]: util/inteltool: Fix LynxPoint (non-LP) GPIO register map

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/29167 )

Change subject: util/inteltool: Fix LynxPoint (non-LP) GPIO register map
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util/inteltool: Fix LynxPoint (non-LP) GPIO register map

The GPIO register dumper code for the LynxPoint family PCH chips
(Intel 8 Series and C220 Series) was incorrectly using a
shortened version of the LynxPoint-LP GPIO register map.
Switched to the correct register map for the affected chipsets.

Change-Id: I394a198bbb6628915cb73cabc5c8ff808579a07f
Signed-off-by: Fehér Roland Ádám 
Reviewed-on: https://review.coreboot.org/29167
Reviewed-by: Nico Huber 
Tested-by: build bot (Jenkins) 
---
M util/inteltool/gpio.c
1 file changed, 2 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Nico Huber: Looks good to me, approved

diff --git a/util/inteltool/gpio.c b/util/inteltool/gpio.c
index c38051c..b4225a7 100644
--- a/util/inteltool/gpio.c
+++ b/util/inteltool/gpio.c
@@ -869,9 +869,8 @@
    case PCI_DEVICE_ID_INTEL_C226:
    case PCI_DEVICE_ID_INTEL_H81:
    	gpiobase = pci_read_word(sb, 0x48) & 0xfffc;
-		gpio_registers = lynxpoint_lp_gpio_registers;
-		/* Shares register locations but has less of them */
-		size = 29;
+		gpio_registers = pch_gpio_registers;
+		size = ARRAY_SIZE(pch_gpio_registers);
    	break;
    case PCI_DEVICE_ID_INTEL_3400:
    case PCI_DEVICE_ID_INTEL_3420: