Patch set updated for coreboot: a6a1adc baytrail: Fix EHCI function number and XHCI typo

[Aaron Durbin]

Aaron Durbin ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4920

-gerrit

commit a6a1adc3d16d13354fbd36982b2af10d94842dcd
Author: Duncan Laurie 
Date:   Fri Nov 1 07:55:07 2013 -0700

baytrail: Fix EHCI function number and XHCI typo

BUG=chrome-os-partner:23635
    BRANCH=rambi
    TEST=successfully disable EHCI controller in devicetree.cb

Change-Id: I8a22e25a9f7c263d2a6debf0cd1606cb0f6f7645
    Signed-off-by: Duncan Laurie 
    Reviewed-on: https://chromium-review.googlesource.com/175403
    Reviewed-by: Aaron Durbin 
    Signed-off-by: Aaron Durbin 
---
 src/soc/intel/baytrail/baytrail/pci_devs.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/soc/intel/baytrail/baytrail/pci_devs.h b/src/soc/intel/baytrail/baytrail/pci_devs.h
index 6b38a71..96e9547 100644
--- a/src/soc/intel/baytrail/baytrail/pci_devs.h
+++ b/src/soc/intel/baytrail/baytrail/pci_devs.h
@@ -53,7 +53,7 @@
 /* xHCI */
 #define XHCI_DEV 20
 #define XHCI_FUNC 0
-# define XCHI_DEVID 0x0f35
+# define XHCI_DEVID 0x0f35

/* LPE Audio */
 #define LPE_DEV 21
@@ -119,7 +119,7 @@

/* EHCI */
 #define EHCI_DEV 29
-#define EHCI_FUNC 29
+#define EHCI_FUNC 0
 # define EHCI_DEVID 0x0f34

/* Serial IO 2 */