Hello Alex Levin,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/39421
to review the following change.
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
mb/google/volteer: Disable WWAN PCIe
Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer.
BUG=b:146226689 BRANCH=none TEST=lsusb shows WWAN device
Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8 Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/gpio.c 2 files changed, 3 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/39421/1
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index f7cc1be..f57b9ca 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -56,12 +56,8 @@ register "PcieClkSrcUsage[1]" = "6" register "PcieClkSrcClkReq[1]" = "1"
- # Enable WWAN PCIE 6 using clk 2 - register "PcieRpEnable[5]" = "1" - register "PcieClkSrcUsage[2]" = "5" - register "PcieClkSrcClkReq[2]" = "2" - # Mark SRCCLKREQ pins as unused that are routed for a Non-Clkreq functionality + register "PcieClkSrcUsage[2]" = "0xFF" register "PcieClkSrcUsage[4]" = "0xFF" register "PcieClkSrcUsage[5]" = "0xFF" register "PcieClkSrcUsage[6]" = "0xFF" @@ -323,7 +319,7 @@ device pci 1c.2 off end # RP3 0xA0BA device pci 1c.3 off end # RP4 0xA0BB device pci 1c.4 off end # RP5 0xA0BC - device pci 1c.5 on end # WWAN RP6 0xA0BD + device pci 1c.5 off end # WWAN RP6 0xA0BD device pci 1c.6 on end # RP7 0xA0BE device pci 1c.7 on end # SD Card RP8 0xA0BF
diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index f6dbed0..e9d1028 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -170,7 +170,7 @@ /* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */ - PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), + PAD_CFG_NC(GPP_D7, NONE), /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39421 )
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39421/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39421/1/src/mainboard/google/voltee... PS1, Line 173: PAD_CFG_NC PAD_NC?
Hello build bot (Jenkins), Alex Levin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39421
to look at the new patch set (#2).
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
mb/google/volteer: Disable WWAN PCIe
Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer.
BUG=b:146226689 BRANCH=none TEST=lsusb shows WWAN device
Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8 Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/gpio.c 2 files changed, 4 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/39421/2
Hello build bot (Jenkins), Alex Levin,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/39421
to look at the new patch set (#3).
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
mb/google/volteer: Disable WWAN PCIe
Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer.
BUG=b:146226689 BRANCH=none TEST=lsusb shows WWAN device
Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8 Signed-off-by: Nick Vaccaro nvaccaro@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/gpio.c 2 files changed, 3 insertions(+), 7 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/39421/3
Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39421 )
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/39421/1/src/mainboard/google/voltee... File src/mainboard/google/volteer/variants/baseboard/gpio.c:
https://review.coreboot.org/c/coreboot/+/39421/1/src/mainboard/google/voltee... PS1, Line 173: PAD_CFG_NC
PAD_NC?
Done
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39421 )
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
Patch Set 3: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39421 )
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
mb/google/volteer: Disable WWAN PCIe
Disable WWAN PCIe to allow WWAN enumerate as USB on Volteer.
BUG=b:146226689 BRANCH=none TEST=lsusb shows WWAN device
Change-Id: I04e49e3ec989d20ea3469fce06051c475b0ed0c8 Signed-off-by: Nick Vaccaro nvaccaro@google.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39421 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Furquan Shaikh furquan@google.com --- M src/mainboard/google/volteer/variants/baseboard/devicetree.cb M src/mainboard/google/volteer/variants/baseboard/gpio.c 2 files changed, 3 insertions(+), 7 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index dd6895b..b08ff7d 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -56,12 +56,8 @@ register "PcieClkSrcUsage[1]" = "6" register "PcieClkSrcClkReq[1]" = "1"
- # Enable WWAN PCIE 6 using clk 2 - register "PcieRpEnable[5]" = "1" - register "PcieClkSrcUsage[2]" = "5" - register "PcieClkSrcClkReq[2]" = "2" - # Mark SRCCLKREQ pins as unused that are routed for a Non-Clkreq functionality + register "PcieClkSrcUsage[2]" = "0xFF" register "PcieClkSrcUsage[4]" = "0xFF" register "PcieClkSrcUsage[5]" = "0xFF" register "PcieClkSrcUsage[6]" = "0xFF" @@ -309,7 +305,7 @@ device pci 1c.2 off end # RP3 0xA0BA device pci 1c.3 off end # RP4 0xA0BB device pci 1c.4 off end # RP5 0xA0BC - device pci 1c.5 on end # WWAN RP6 0xA0BD + device pci 1c.5 off end # WWAN RP6 0xA0BD device pci 1c.6 on end # RP7 0xA0BE device pci 1c.7 on end # SD Card RP8 0xA0BF
diff --git a/src/mainboard/google/volteer/variants/baseboard/gpio.c b/src/mainboard/google/volteer/variants/baseboard/gpio.c index f6dbed0..da3e542 100644 --- a/src/mainboard/google/volteer/variants/baseboard/gpio.c +++ b/src/mainboard/google/volteer/variants/baseboard/gpio.c @@ -170,7 +170,7 @@ /* D6 : SRCCLKREQ1# ==> WLAN_CLKREQ_ODL */ PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), /* D7 : SRCCLKREQ2# ==> WWAN_CLKREQ_ODL */ - PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1), + PAD_NC(GPP_D7, NONE), /* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */ PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1), /* D9 : ISH_SPI_CS# ==> PCH_GSPI2_CVF_CS_L */
9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39421 )
Change subject: mb/google/volteer: Disable WWAN PCIe ......................................................................
Patch Set 5:
Automatic boot test returned (PASS/FAIL/TOTAL): 3/0/3 Emulation targets: EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1253 EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1252 EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1251
Please note: This test is under development and might not be accurate at all!
-
9elements QA (Code Review) -
Furquan Shaikh (Code Review)
-
Nick Vaccaro (Code Review)
-
Patrick Georgi (Code Review)