Attention is currently required from: Jason Glenesk, Raul Rangel, Marshall Dawson. Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/50482 )
Change subject: soc/amd/cezanne/cpu: add basic zen_2_3_init functionality ......................................................................
soc/amd/cezanne/cpu: add basic zen_2_3_init functionality
The MCA MSRs aren't getting cleared and no microcode update gets applied for now. Both will be added later.
Signed-off-by: Felix Held felix-coreboot@felixheld.de Change-Id: I38ce5d11787ffefdd0183c5540ae2683158cbee8 --- M src/soc/amd/cezanne/cpu.c 1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/50482/1
diff --git a/src/soc/amd/cezanne/cpu.c b/src/soc/amd/cezanne/cpu.c index 3e0a7db..cd2d6ed 100644 --- a/src/soc/amd/cezanne/cpu.c +++ b/src/soc/amd/cezanne/cpu.c @@ -1,12 +1,16 @@ /* SPDX-License-Identifier: GPL-2.0-only */
+#include <amdblocks/cpu.h> #include <console/console.h> #include <cpu/cpu.h> +#include <cpu/x86/lapic.h> #include <device/device.h> #include <soc/cpu.h>
static void zen_2_3_init(struct device *dev) { + setup_lapic(); + set_cstate_io_addr(); }
static struct device_operations cpu_dev_ops = {