Change in coreboot[master]: cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.

[Arthur Heymans (Code Review)]

Hello Patrick Rudolph, build bot (Jenkins),

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/35994

to look at the new patch set (#7).

Change subject: cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.
......................................................................

cpu/intel/core2: Cache XIP romstage with C_ENVIRONMENT_BOOTBLOCK.

Tested on Thinkpad X200: the romstage execution speeds are back to
pre-C_ENVIRONMENT_BOOTBLOCK levels.

Change-Id: Id0b50d2f56e7cc0e055cdc8b9aa28794327eca28
Signed-off-by: Arthur Heymans 
---
M src/cpu/intel/model_1067x/Kconfig
M src/cpu/intel/model_6fx/Kconfig
M src/cpu/x86/mtrr/xip_cache.c
3 files changed, 10 insertions(+), 6 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/35994/7