Change in coreboot[master]: Add TPM support for wedge100s

[Mikołaj Walczak (Code Review)]

Mikołaj Walczak has uploaded this change for review. ( https://review.coreboot.org/28529

Change subject: Add TPM support for wedge100s
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Add TPM support for wedge100s

Change-Id: Id7e8ad63de2a6094c66cbd47ae9b7707a9af4e81
---
M src/mainboard/ocp/wedge100s/Kconfig
M src/mainboard/ocp/wedge100s/devicetree.cb
2 files changed, 7 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/28529/1

diff --git a/src/mainboard/ocp/wedge100s/Kconfig b/src/mainboard/ocp/wedge100s/Kconfig
index 6a33edb..c4a1503 100644
--- a/src/mainboard/ocp/wedge100s/Kconfig
+++ b/src/mainboard/ocp/wedge100s/Kconfig
@@ -11,6 +11,8 @@
    select SERIRQ_CONTINUOUS_MODE
    select SUPERIO_ITE_COMMON_ROMSTAGE
    select FSP_EHCI1_ENABLE
+	select MAINBOARD_HAS_LPC_TPM
+	select MAINBOARD_HAS_TPM1

config MAINBOARD_DIR
    string
diff --git a/src/mainboard/ocp/wedge100s/devicetree.cb b/src/mainboard/ocp/wedge100s/devicetree.cb
index 30d99c2..3d66d0d 100644
--- a/src/mainboard/ocp/wedge100s/devicetree.cb
+++ b/src/mainboard/ocp/wedge100s/devicetree.cb
@@ -7,7 +7,11 @@
    	device pci 14.0 on end # xHCI Controller
    	device pci 19.0 on end # Gigabit LAN Controller
    	device pci 1d.0 on end # EHCI Controller
-		device pci 1f.0 on end # LPC Bridge
+		device pci 1f.0 on
+			chip drivers/pc80/tpm
+				device pnp 0c31.0 on end
+			end
+		end # LPC Bridge
    	device pci 1f.2 on end # SATA Controller
    	device pci 1f.3 on end # SMBus Controller
    	device pci 1f.5 on end # SATA Controller