[M] Change in coreboot[master]: soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/73291 )
Change subject: soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol ......................................................................
soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol
Replace the SOC_INTEL_TIGERLAKE_S3 and SOC_INTEL_ALDERLAKE_S3 with the D3COLD_SUPPORT symbol, as it allows for more granular control.
Signed-off-by: Sean Rhodes sean@starlabs.systems Change-Id: I07e8c84e5ad8f390bfbac017dd23736e7a6ced9e Reviewed-on: https://review.coreboot.org/c/coreboot/+/73291 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Lean Sheng Tan sheng.tan@9elements.com --- M src/soc/intel/alderlake/Kconfig M src/soc/intel/alderlake/acpi/tcss.asl M src/soc/intel/alderlake/acpi/tcss_dma.asl M src/soc/intel/alderlake/acpi/tcss_pcierp.asl M src/soc/intel/alderlake/acpi/tcss_xhci.asl M src/soc/intel/tigerlake/Kconfig M src/soc/intel/tigerlake/acpi/tcss.asl M src/soc/intel/tigerlake/acpi/tcss_dma.asl M src/soc/intel/tigerlake/acpi/tcss_pcierp.asl M src/soc/intel/tigerlake/acpi/tcss_xhci.asl 10 files changed, 51 insertions(+), 47 deletions(-)
Approvals: build bot (Jenkins): Verified Lean Sheng Tan: Looks good to me, approved
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index dd6bb22..a8c9aeb 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -328,12 +328,6 @@ int default 8
-config SOC_INTEL_ALDERLAKE_S3 - bool - default n - help - Select if using S3 instead of S0ix to disable D3Cold. - config ENABLE_SATA_TEST_MODE bool "Enable test mode for SATA margining" default n diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index 1f626fc..5c95997 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -583,7 +583,7 @@ } }
-#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -654,7 +654,7 @@ STAT = 0 } } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT
/* * TCSS xHCI device diff --git a/src/soc/intel/alderlake/acpi/tcss_dma.asl b/src/soc/intel/alderlake/acpi/tcss_dma.asl index 1483c0b..ca47bd0 100644 --- a/src/soc/intel/alderlake/acpi/tcss_dma.asl +++ b/src/soc/intel/alderlake/acpi/tcss_dma.asl @@ -28,16 +28,16 @@
Method (_S0W, 0x0) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x04) #else Return (0x03) -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR0) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -49,12 +49,12 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR3) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -66,7 +66,7 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* diff --git a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl index 4f1eec5..6dbde46 100644 --- a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl @@ -247,16 +247,16 @@
Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR0) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR3) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* diff --git a/src/soc/intel/alderlake/acpi/tcss_xhci.asl b/src/soc/intel/alderlake/acpi/tcss_xhci.asl index c0dc141..ddc5a66 100644 --- a/src/soc/intel/alderlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/alderlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@
Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* @@ -43,7 +43,7 @@ */ Name (SD3C, 0)
-#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (_PR0) { Return (Package () { _SB.PCI0.D3C }) @@ -53,7 +53,7 @@ { Return (Package () { _SB.PCI0.D3C }) } -#endif // SOC_INTEL_ALDERLAKE_S3 +#endif // D3COLD_SUPPORT
/* * XHCI controller _DSM method diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 788ee51..d4b16c0 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -206,12 +206,6 @@ int default 6
-config SOC_INTEL_TIGERLAKE_S3 - bool - default n - help - Select if using S3 instead of S0ix to disable D3Cold - config SOC_INTEL_UART_DEV_MAX int default 3 diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index be9d306..98337a3 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -676,7 +676,7 @@ } }
-#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -787,7 +787,7 @@ STAT = 0 } } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT
/* * TCSS xHCI device diff --git a/src/soc/intel/tigerlake/acpi/tcss_dma.asl b/src/soc/intel/tigerlake/acpi/tcss_dma.asl index 3c19ef6..bbb0b6a 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_dma.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_dma.asl @@ -27,11 +27,11 @@
Method (_S0W, 0x0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x04) #else Return (0x03) -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* @@ -40,7 +40,7 @@ */ Method (_PR0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -52,12 +52,12 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR3) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If (DUID == 0) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -69,7 +69,7 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* diff --git a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl index fda58e7..a8e19ed 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_pcierp.asl @@ -247,7 +247,7 @@
Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) @@ -256,7 +256,7 @@
Method (_PR0) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
Method (_PR3) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) If ((TUID == 0) || (TUID == 1)) { Return (Package() { _SB.PCI0.D3C, _SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ } Else { Return (Package() { _SB.PCI0.TBT1 }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* diff --git a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl index a3b8c8f..ddc5a66 100644 --- a/src/soc/intel/tigerlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/tigerlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@
Method (_S0W, 0x0, NotSerialized) { -#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Return (0x4) #else Return (0x3) -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT }
/* @@ -43,7 +43,7 @@ */ Name (SD3C, 0)
-#if !CONFIG(SOC_INTEL_TIGERLAKE_S3) +#if CONFIG(D3COLD_SUPPORT) Method (_PR0) { Return (Package () { _SB.PCI0.D3C }) @@ -53,7 +53,7 @@ { Return (Package () { _SB.PCI0.D3C }) } -#endif // SOC_INTEL_TIGERLAKE_S3 +#endif // D3COLD_SUPPORT
/* * XHCI controller _DSM method
-
Felix Held (Code Review)