Change in ...coreboot[master]: riscv: realign our naming with the true names

[ron minnich (Code Review)]

ron minnich has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31079

Change subject: riscv: realign our naming with the true names
......................................................................

riscv: realign our naming with the true names

The riscv world has decided that
riscv means rv32
riscv64 means rv64

and that, further, nobody is going to use names like rv32 or rv64! Poor choices IMHO but
seems it's too late to change.

This is the first step on aligning coreboot naming to the outside world. Partly this is needed
for a 32-bit RISCV processor coming to you soon, but largely it's good to be aligned with
everyone else's naming.

A primary goal here is that src/arch/riscv continues to mean "all riscv regardless of word size"
even though it arguably is not following the naming. But the 32- and 64-bit isa's are essentially
the same save for XLEN, so this ought to work.

Choosing 32- or 64-bit is done in mainboards, hence the name change for the
emulation targets. With luck, we might someday be able to say "build the emulation
target and pick the 32-bit variant" but our naming does not quite allow that yet.

In future commits we'll probably want to move src/soc/ucb/riscv to src/soc/ucb/riscv64
but it's nice to minimize breakage.

Change-Id: If842767a4b6c5e82df99b5a57b524b88044afcba
Signed-off-by: Ronald G. Minnich 
---
M MAINTAINERS
R src/mainboard/emulation/qemu-riscv64/Kconfig
R src/mainboard/emulation/qemu-riscv64/Kconfig.name
R src/mainboard/emulation/qemu-riscv64/Makefile.inc
R src/mainboard/emulation/qemu-riscv64/board_info.txt
R src/mainboard/emulation/qemu-riscv64/devicetree.cb
R src/mainboard/emulation/qemu-riscv64/mainboard.c
R src/mainboard/emulation/qemu-riscv64/memlayout.ld
R src/mainboard/emulation/qemu-riscv64/mtime.c
R src/mainboard/emulation/qemu-riscv64/rom_media.c
R src/mainboard/emulation/qemu-riscv64/romstage.c
R src/mainboard/emulation/qemu-riscv64/uart.c
D src/mainboard/emulation/spike-riscv/Kconfig.name
R src/mainboard/emulation/spike-riscv64/Kconfig
A src/mainboard/emulation/spike-riscv64/Kconfig.name
R src/mainboard/emulation/spike-riscv64/Makefile.inc
R src/mainboard/emulation/spike-riscv64/board_info.txt
R src/mainboard/emulation/spike-riscv64/clint.c
R src/mainboard/emulation/spike-riscv64/devicetree.cb
R src/mainboard/emulation/spike-riscv64/mainboard.c
R src/mainboard/emulation/spike-riscv64/memlayout.ld
R src/mainboard/emulation/spike-riscv64/rom_media.c
R src/mainboard/emulation/spike-riscv64/romstage.c
R src/mainboard/emulation/spike-riscv64/uart.c
24 files changed, 12 insertions(+), 12 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/31079/1

diff --git a/MAINTAINERS b/MAINTAINERS
index fbaad69..8131178 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -141,7 +141,7 @@
 F:	src/arch/riscv/
 F:	src/soc/sifive/
 F:	src/soc/ucb/
-F:	src/mainboard/emulation/*-riscv/
+F:	src/mainboard/emulation/*-riscv*/
 F:	src/mainboard/sifive/
 F:	util/riscv/

diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig b/src/mainboard/emulation/qemu-riscv64/Kconfig
similarity index 91%
rename from src/mainboard/emulation/qemu-riscv/Kconfig
rename to src/mainboard/emulation/qemu-riscv64/Kconfig
index 528b21e..62b8e3a 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig
+++ b/src/mainboard/emulation/qemu-riscv64/Kconfig
@@ -27,11 +27,11 @@

config MAINBOARD_DIR
    string
-	default emulation/qemu-riscv
+	default emulation/qemu-riscv64

config MAINBOARD_PART_NUMBER
    string
-	default "QEMU RISCV"
+	default "QEMU RISCV64"

config MAX_CPUS
    int
@@ -41,4 +41,4 @@
    int
    default 32768

-endif #  BOARD_EMULATION_QEMU_RISCV
+endif #  BOARD_EMULATION_QEMU_RISCV64
diff --git a/src/mainboard/emulation/qemu-riscv/Kconfig.name b/src/mainboard/emulation/qemu-riscv64/Kconfig.name
similarity index 61%
rename from src/mainboard/emulation/qemu-riscv/Kconfig.name
rename to src/mainboard/emulation/qemu-riscv64/Kconfig.name
index e9243e6..54454cb 100644
--- a/src/mainboard/emulation/qemu-riscv/Kconfig.name
+++ b/src/mainboard/emulation/qemu-riscv64/Kconfig.name
@@ -1,2 +1,2 @@
 config BOARD_EMULATION_QEMU_RISCV
-	bool "QEMU riscv"
+	bool "QEMU riscv64"
diff --git a/src/mainboard/emulation/qemu-riscv/Makefile.inc b/src/mainboard/emulation/qemu-riscv64/Makefile.inc
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/Makefile.inc
rename to src/mainboard/emulation/qemu-riscv64/Makefile.inc
diff --git a/src/mainboard/emulation/qemu-riscv/board_info.txt b/src/mainboard/emulation/qemu-riscv64/board_info.txt
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/board_info.txt
rename to src/mainboard/emulation/qemu-riscv64/board_info.txt
diff --git a/src/mainboard/emulation/qemu-riscv/devicetree.cb b/src/mainboard/emulation/qemu-riscv64/devicetree.cb
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/devicetree.cb
rename to src/mainboard/emulation/qemu-riscv64/devicetree.cb
diff --git a/src/mainboard/emulation/qemu-riscv/mainboard.c b/src/mainboard/emulation/qemu-riscv64/mainboard.c
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/mainboard.c
rename to src/mainboard/emulation/qemu-riscv64/mainboard.c
diff --git a/src/mainboard/emulation/qemu-riscv/memlayout.ld b/src/mainboard/emulation/qemu-riscv64/memlayout.ld
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/memlayout.ld
rename to src/mainboard/emulation/qemu-riscv64/memlayout.ld
diff --git a/src/mainboard/emulation/qemu-riscv/mtime.c b/src/mainboard/emulation/qemu-riscv64/mtime.c
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/mtime.c
rename to src/mainboard/emulation/qemu-riscv64/mtime.c
diff --git a/src/mainboard/emulation/qemu-riscv/rom_media.c b/src/mainboard/emulation/qemu-riscv64/rom_media.c
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/rom_media.c
rename to src/mainboard/emulation/qemu-riscv64/rom_media.c
diff --git a/src/mainboard/emulation/qemu-riscv/romstage.c b/src/mainboard/emulation/qemu-riscv64/romstage.c
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/romstage.c
rename to src/mainboard/emulation/qemu-riscv64/romstage.c
diff --git a/src/mainboard/emulation/qemu-riscv/uart.c b/src/mainboard/emulation/qemu-riscv64/uart.c
similarity index 100%
rename from src/mainboard/emulation/qemu-riscv/uart.c
rename to src/mainboard/emulation/qemu-riscv64/uart.c
diff --git a/src/mainboard/emulation/spike-riscv/Kconfig.name b/src/mainboard/emulation/spike-riscv/Kconfig.name
deleted file mode 100644
index 17549c6..0000000
--- a/src/mainboard/emulation/spike-riscv/Kconfig.name
+++ /dev/null
@@ -1,3 +0,0 @@
-config BOARD_EMULATION_SPIKE_RISCV
-	bool "SPIKE riscv"
-	help
diff --git a/src/mainboard/emulation/spike-riscv/Kconfig b/src/mainboard/emulation/spike-riscv64/Kconfig
similarity index 86%
rename from src/mainboard/emulation/spike-riscv/Kconfig
rename to src/mainboard/emulation/spike-riscv64/Kconfig
index f8c98ab..c09b621 100644
--- a/src/mainboard/emulation/spike-riscv/Kconfig
+++ b/src/mainboard/emulation/spike-riscv64/Kconfig
@@ -12,7 +12,7 @@
 ## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 ## GNU General Public License for more details.

-if BOARD_EMULATION_SPIKE_RISCV
+if BOARD_EMULATION_SPIKE_RISCV64

config BOARD_SPECIFIC_OPTIONS
    def_bool y
@@ -24,14 +24,14 @@

config MAINBOARD_DIR
    string
-	default emulation/spike-riscv
+	default emulation/spike-riscv64

config MAINBOARD_PART_NUMBER
    string
-	default "SPIKE RISCV"
+	default "SPIKE RISCV64"

config MAX_CPUS
    int
    default 1

-endif #  BOARD_EMULATION_SPIKE_RISCV
+endif #  BOARD_EMULATION_SPIKE_RISCV64
diff --git a/src/mainboard/emulation/spike-riscv64/Kconfig.name b/src/mainboard/emulation/spike-riscv64/Kconfig.name
new file mode 100644
index 0000000..b743bd5
--- /dev/null
+++ b/src/mainboard/emulation/spike-riscv64/Kconfig.name
@@ -0,0 +1,3 @@
+config BOARD_EMULATION_SPIKE_RISCV64
+	bool "SPIKE riscv64"
+	help
diff --git a/src/mainboard/emulation/spike-riscv/Makefile.inc b/src/mainboard/emulation/spike-riscv64/Makefile.inc
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/Makefile.inc
rename to src/mainboard/emulation/spike-riscv64/Makefile.inc
diff --git a/src/mainboard/emulation/spike-riscv/board_info.txt b/src/mainboard/emulation/spike-riscv64/board_info.txt
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/board_info.txt
rename to src/mainboard/emulation/spike-riscv64/board_info.txt
diff --git a/src/mainboard/emulation/spike-riscv/clint.c b/src/mainboard/emulation/spike-riscv64/clint.c
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/clint.c
rename to src/mainboard/emulation/spike-riscv64/clint.c
diff --git a/src/mainboard/emulation/spike-riscv/devicetree.cb b/src/mainboard/emulation/spike-riscv64/devicetree.cb
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/devicetree.cb
rename to src/mainboard/emulation/spike-riscv64/devicetree.cb
diff --git a/src/mainboard/emulation/spike-riscv/mainboard.c b/src/mainboard/emulation/spike-riscv64/mainboard.c
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/mainboard.c
rename to src/mainboard/emulation/spike-riscv64/mainboard.c
diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv64/memlayout.ld
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/memlayout.ld
rename to src/mainboard/emulation/spike-riscv64/memlayout.ld
diff --git a/src/mainboard/emulation/spike-riscv/rom_media.c b/src/mainboard/emulation/spike-riscv64/rom_media.c
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/rom_media.c
rename to src/mainboard/emulation/spike-riscv64/rom_media.c
diff --git a/src/mainboard/emulation/spike-riscv/romstage.c b/src/mainboard/emulation/spike-riscv64/romstage.c
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/romstage.c
rename to src/mainboard/emulation/spike-riscv64/romstage.c
diff --git a/src/mainboard/emulation/spike-riscv/uart.c b/src/mainboard/emulation/spike-riscv64/uart.c
similarity index 100%
rename from src/mainboard/emulation/spike-riscv/uart.c
rename to src/mainboard/emulation/spike-riscv64/uart.c

[ron minnich (Code Review)]

Hello Julius Werner, Jonathan Neuschäfer, build bot (Jenkins), Philipp Hug, Patrick Georgi, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31079

to look at the new patch set (#2).

Change subject: riscv: realign our naming with the true names
......................................................................

riscv: realign our naming with the true names

The riscv world has decided that
riscv means rv32
riscv64 means rv64

and that, further, nobody is going to use names like rv32 or rv64! Poor choices IMHO but
seems it's too late to change.

This is the first step on aligning coreboot naming to the outside world. Partly this is needed
for a 32-bit RISCV processor coming to you soon, but largely it's good to be aligned with
everyone else's naming.

A primary goal here is that src/arch/riscv continues to mean "all riscv regardless of word size"
even though it arguably is not following the naming. But the 32- and 64-bit isa's are essentially
the same save for XLEN, so this ought to work.

Choosing 32- or 64-bit is done in mainboards, hence the name change for the
emulation targets. With luck, we might someday be able to say "build the emulation
target and pick the 32-bit variant" but our naming does not quite allow that yet.

In future commits we'll probably want to move src/soc/ucb/riscv to src/soc/ucb/riscv64
but it's nice to minimize breakage.

Change-Id: If842767a4b6c5e82df99b5a57b524b88044afcba
Signed-off-by: Ronald G. Minnich 
---
M MAINTAINERS
R src/mainboard/emulation/qemu-riscv64/Kconfig
R src/mainboard/emulation/qemu-riscv64/Kconfig.name
R src/mainboard/emulation/qemu-riscv64/Makefile.inc
R src/mainboard/emulation/qemu-riscv64/board_info.txt
R src/mainboard/emulation/qemu-riscv64/devicetree.cb
R src/mainboard/emulation/qemu-riscv64/mainboard.c
R src/mainboard/emulation/qemu-riscv64/memlayout.ld
R src/mainboard/emulation/qemu-riscv64/mtime.c
R src/mainboard/emulation/qemu-riscv64/rom_media.c
R src/mainboard/emulation/qemu-riscv64/romstage.c
R src/mainboard/emulation/qemu-riscv64/uart.c
D src/mainboard/emulation/spike-riscv/Kconfig.name
D src/mainboard/emulation/spike-riscv/devicetree.cb
R src/mainboard/emulation/spike-riscv64/Kconfig
A src/mainboard/emulation/spike-riscv64/Kconfig.name
R src/mainboard/emulation/spike-riscv64/Makefile.inc
R src/mainboard/emulation/spike-riscv64/board_info.txt
R src/mainboard/emulation/spike-riscv64/clint.c
C src/mainboard/emulation/spike-riscv64/devicetree.cb
R src/mainboard/emulation/spike-riscv64/mainboard.c
R src/mainboard/emulation/spike-riscv64/memlayout.ld
R src/mainboard/emulation/spike-riscv64/rom_media.c
R src/mainboard/emulation/spike-riscv64/romstage.c
R src/mainboard/emulation/spike-riscv64/uart.c
R src/soc/ucb/riscv64/Kconfig
R src/soc/ucb/riscv64/Makefile.inc
R src/soc/ucb/riscv64/cbmem.c
R src/soc/ucb/riscv64/ipi.c
29 files changed, 19 insertions(+), 39 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/31079/2

[Patrick Georgi (Code Review)]

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31079 )

Change subject: riscv: realign our naming with the true names
......................................................................

Patch Set 2: Code-Review+2

[Patrick Georgi (Code Review)]

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31079 )

Change subject: riscv: realign our naming with the true names
......................................................................

Patch Set 2:

needs rebase

[ron minnich (Code Review)]

Hello Julius Werner, Jonathan Neuschäfer, build bot (Jenkins), Patrick Georgi, Philipp Hug, Martin Roth,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/31079

to look at the new patch set (#3).

Change subject: riscv: realign our naming with the true names
......................................................................

riscv: realign our naming with the true names

The riscv world has decided that
riscv means rv32
riscv64 means rv64

and that, further, nobody is going to use names like rv32 or rv64! Poor choices IMHO but
seems it's too late to change.

This is the first step on aligning coreboot naming to the outside world. Partly this is needed
for a 32-bit RISCV processor coming to you soon, but largely it's good to be aligned with
everyone else's naming.

A primary goal here is that src/arch/riscv continues to mean "all riscv regardless of word size"
even though it arguably is not following the naming. But the 32- and 64-bit isa's are essentially
the same save for XLEN, so this ought to work.

Choosing 32- or 64-bit is done in mainboards, hence the name change for the
emulation targets. With luck, we might someday be able to say "build the emulation
target and pick the 32-bit variant" but our naming does not quite allow that yet.

In future commits we'll probably want to move src/soc/ucb/riscv to src/soc/ucb/riscv64
but it's nice to minimize breakage.

Change-Id: If842767a4b6c5e82df99b5a57b524b88044afcba
Signed-off-by: Ronald G. Minnich 
---
M MAINTAINERS
R src/mainboard/emulation/qemu-riscv64/Kconfig
R src/mainboard/emulation/qemu-riscv64/Kconfig.name
R src/mainboard/emulation/qemu-riscv64/Makefile.inc
R src/mainboard/emulation/qemu-riscv64/board_info.txt
R src/mainboard/emulation/qemu-riscv64/clint.c
R src/mainboard/emulation/qemu-riscv64/devicetree.cb
R src/mainboard/emulation/qemu-riscv64/include/mainboard/addressmap.h
R src/mainboard/emulation/qemu-riscv64/mainboard.c
R src/mainboard/emulation/qemu-riscv64/memlayout.ld
R src/mainboard/emulation/qemu-riscv64/rom_media.c
R src/mainboard/emulation/qemu-riscv64/romstage.c
R src/mainboard/emulation/qemu-riscv64/uart.c
D src/mainboard/emulation/spike-riscv/Kconfig.name
D src/mainboard/emulation/spike-riscv/devicetree.cb
R src/mainboard/emulation/spike-riscv64/Kconfig
A src/mainboard/emulation/spike-riscv64/Kconfig.name
R src/mainboard/emulation/spike-riscv64/Makefile.inc
R src/mainboard/emulation/spike-riscv64/board_info.txt
R src/mainboard/emulation/spike-riscv64/clint.c
C src/mainboard/emulation/spike-riscv64/devicetree.cb
R src/mainboard/emulation/spike-riscv64/mainboard.c
R src/mainboard/emulation/spike-riscv64/memlayout.ld
R src/mainboard/emulation/spike-riscv64/rom_media.c
R src/mainboard/emulation/spike-riscv64/romstage.c
R src/mainboard/emulation/spike-riscv64/uart.c
R src/soc/ucb/riscv64/Kconfig
R src/soc/ucb/riscv64/Makefile.inc
R src/soc/ucb/riscv64/cbmem.c
R src/soc/ucb/riscv64/ipi.c
30 files changed, 19 insertions(+), 39 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/31079/3

[ron minnich (Code Review)]

ron minnich has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31079 )

Change subject: riscv: realign our naming with the true names
......................................................................

Patch Set 3: Code-Review-2

This does't seem quite right

[ron minnich (Code Review)]

ron minnich has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31079 )

Change subject: riscv: realign our naming with the true names
......................................................................

Abandoned

Philip Hug's stuff is way way better.