Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Add Intel C620 PCIe IDs ......................................................................
pci_ids: Add Intel C620 PCIe IDs
Add PCIe IDs for Intel Corporation C620 series chipset.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b --- M src/include/device/pci_ids.h M src/soc/intel/common/block/lpc/lpc.c M src/soc/intel/common/block/p2sb/p2sb.c M src/soc/intel/common/block/smbus/smbus.c 4 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/37215/1
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c05640f..e75f153 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -2801,6 +2801,7 @@ #define PCI_DEVICE_ID_INTEL_TGP_ESPI_24 0xA09D #define PCI_DEVICE_ID_INTEL_TGP_ESPI_25 0xA09E #define PCI_DEVICE_ID_INTEL_TGP_ESPI_26 0xA09F +#define PCI_DEVICE_ID_INTEL_C620_LPC 0xA1C1
/* Intel PCIE device ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_PCIE_RP1 0x9d10 @@ -3041,6 +3042,7 @@ #define PCI_DEVICE_ID_INTEL_ICP_PMC 0x34a1 #define PCI_DEVICE_ID_INTEL_CMP_PMC 0x02a1 #define PCI_DEVICE_ID_INTEL_TGP_PMC 0xa0a1 +#define PCI_DEVICE_ID_INTEL_C620_PMC 0xa1a1
/* Intel I2C device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_I2C0 0x9d60 @@ -3171,6 +3173,7 @@ #define PCI_DEVICE_ID_INTEL_TGP_GSPI4 0xa0fe #define PCI_DEVICE_ID_INTEL_TGP_GSPI5 0xa0de #define PCI_DEVICE_ID_INTEL_TGP_GSPI6 0xa0df +#define PCI_DEVICE_ID_INTEL_C620_SPI 0xa1a4
/* Intel IGD device Ids */ #define PCI_DEVICE_ID_INTEL_SKL_GT1F_DT2 0x1902 @@ -3330,6 +3333,7 @@ #define PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS 0x34a3 #define PCI_DEVICE_ID_INTEL_CMP_SMBUS 0x02a3 #define PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS 0xa0a3 +#define PCI_DEVICE_ID_INTEL_C620_SMBUS 0xa1a3
/* Intel XHCI device Ids */ #define PCI_DEVICE_ID_INTEL_APL_XHCI 0x5aa8 @@ -3358,6 +3362,7 @@ #define PCI_DEVICE_ID_INTEL_ICL_P2SB 0x34a0 #define PCI_DEVICE_ID_INTEL_CMP_P2SB 0x02a0 #define PCI_DEVICE_ID_INTEL_TGL_P2SB 0xa0a0 +#define PCI_DEVICE_ID_INTEL_C620_P2SB 0xa1a0
/* Intel SRAM device Ids */ #define PCI_DEVICE_ID_INTEL_APL_SRAM 0x5aec diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c index 249e6d6..2272c89 100644 --- a/src/soc/intel/common/block/lpc/lpc.c +++ b/src/soc/intel/common/block/lpc/lpc.c @@ -222,6 +222,7 @@ PCI_DEVICE_ID_INTEL_TGP_ESPI_24, PCI_DEVICE_ID_INTEL_TGP_ESPI_25, PCI_DEVICE_ID_INTEL_TGP_ESPI_26, + PCI_DEVICE_ID_INTEL_C620_LPC, 0 };
diff --git a/src/soc/intel/common/block/p2sb/p2sb.c b/src/soc/intel/common/block/p2sb/p2sb.c index 981ad07..5b61c4e 100644 --- a/src/soc/intel/common/block/p2sb/p2sb.c +++ b/src/soc/intel/common/block/p2sb/p2sb.c @@ -180,6 +180,7 @@ PCI_DEVICE_ID_INTEL_ICL_P2SB, PCI_DEVICE_ID_INTEL_CMP_P2SB, PCI_DEVICE_ID_INTEL_TGL_P2SB, + PCI_DEVICE_ID_INTEL_C620_P2SB, 0, };
diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 56f54d7..7be3b32 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -96,6 +96,7 @@ PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, PCI_DEVICE_ID_INTEL_CMP_SMBUS, PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS, + PCI_DEVICE_ID_INTEL_C620_SMBUS, 0 };
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Add Intel C620 PCIe IDs ......................................................................
Patch Set 1: Code-Review-1
(6 comments)
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 2720: #define PCI_DEVICE_ID_INTEL_LWB_C621 0xa1c1 Please see https://review.coreboot.org/c/coreboot/+/35030
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 2804: PCI_DEVICE_ID_INTEL_C620_LPC 0xA1C1 This ID already exist - PCI_DEVICE_ID_INTEL_LWB_C621
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3045: PCI_DEVICE_ID_INTEL_C620_PMC 0xa1a1 duplicates PCI_DEVICE_ID_INTEL_LWB_PMC
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3176: PCI_DEVICE_ID_INTEL_C620_SPI duplicates PCI_DEVICE_ID_INTEL_LWB_SPI
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3336: PCI_DEVICE_ID_INTEL_C620_SMBUS duplicates PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3365: #define PCI_DEVICE_ID_INTEL_C620_P2SB 0xa1a0 duplicates PCI_DEVICE_ID_INTEL_LWB_P2SB
Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Add Intel C620 PCIe IDs ......................................................................
Patch Set 1:
Though I will believe to rename to LBG will be better than LWB as that will match with Linux kernel.
Hello Patrick Rudolph, Maxim Polyakov, Johnny Lin, David Hendricks, Lance Zhao, build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37215
to look at the new patch set (#2).
Change subject: pci_ids: Add Intel C620 PCIe IDs ......................................................................
pci_ids: Add Intel C620 PCIe IDs
Add PCIe IDs for Intel Corporation C620 series chipset.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b --- M src/include/device/pci_ids.h M src/soc/intel/common/block/smbus/smbus.c 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/37215/2
Hello Patrick Rudolph, Maxim Polyakov, Johnny Lin, David Hendricks, Lance Zhao, build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37215
to look at the new patch set (#3).
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCIe ID ......................................................................
pci_ids: Update Intel Lewisburg SMBUS PCIe ID
Change PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS to PCI_DEVICE_ID_INTEL_LWB_SMBUS.
Ideally the abbreviation for Lewisburg should be LBG instead of LWB. LWB is used for consistency.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b --- M src/include/device/pci_ids.h M src/soc/intel/common/block/smbus/smbus.c 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/37215/3
Hello Patrick Rudolph, Maxim Polyakov, Johnny Lin, David Hendricks, Lance Zhao, build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37215
to look at the new patch set (#4).
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCIe ID ......................................................................
pci_ids: Update Intel Lewisburg SMBUS PCIe ID
Change PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS to PCI_DEVICE_ID_INTEL_LWB_SMBUS.
Ideally the abbreviation for Lewisburg should be LBG instead of LWB. However, LWB is used for consistency.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b --- M src/include/device/pci_ids.h M src/soc/intel/common/block/smbus/smbus.c 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/37215/4
Lance Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCIe ID ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37215/4/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37215/4/src/include/device/pci_ids.... PS4, Line 3326: Remove the extra tab here.
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCIe ID ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/37215/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37215/4//COMMIT_MSG@7 PS4, Line 7: PCIe ID PCI ID
Hello Patrick Rudolph, Maxim Polyakov, Johnny Lin, David Hendricks, Lance Zhao, build bot (Jenkins), Andrey Petrov,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/37215
to look at the new patch set (#5).
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
pci_ids: Update Intel Lewisburg SMBUS PCI ID
Change PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS to PCI_DEVICE_ID_INTEL_LWB_SMBUS.
Ideally the abbreviation for Lewisburg should be LBG instead of LWB. However, LWB is used for consistency.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b --- M src/include/device/pci_ids.h M src/soc/intel/common/block/smbus/smbus.c 2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/37215/5
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
Patch Set 5: Code-Review+1
Patch Set 1:
Though I will believe to rename to LBG will be better than LWB as that will match with Linux kernel.
I'd suggest using LBG if it's the official name
Jonathan Zhang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
Patch Set 5:
(8 comments)
Patch Set 5: Code-Review+1
Patch Set 1:
Though I will believe to rename to LBG will be better than LWB as that will match with Linux kernel.
I'd suggest using LBG if it's the official name
If everyone agrees, I can rename LWB to LBG. Or we will get this patch in, and do the rename in a sweep at a later time.
https://review.coreboot.org/c/coreboot/+/37215/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/37215/4//COMMIT_MSG@7 PS4, Line 7: PCIe ID
PCI ID
Done
https://review.coreboot.org/c/coreboot/+/37215/4/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37215/4/src/include/device/pci_ids.... PS4, Line 3326:
Remove the extra tab here.
Done
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... File src/include/device/pci_ids.h:
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 2720: #define PCI_DEVICE_ID_INTEL_LWB_C621 0xa1c1
Please see https://review.coreboot. […]
Done
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 2804: PCI_DEVICE_ID_INTEL_C620_LPC 0xA1C1
This ID already exist - PCI_DEVICE_ID_INTEL_LWB_C621
Done
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3045: PCI_DEVICE_ID_INTEL_C620_PMC 0xa1a1
duplicates PCI_DEVICE_ID_INTEL_LWB_PMC
Ack
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3176: PCI_DEVICE_ID_INTEL_C620_SPI
duplicates PCI_DEVICE_ID_INTEL_LWB_SPI
Ack
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3336: PCI_DEVICE_ID_INTEL_C620_SMBUS
duplicates PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS
Ack
https://review.coreboot.org/c/coreboot/+/37215/1/src/include/device/pci_ids.... PS1, Line 3365: #define PCI_DEVICE_ID_INTEL_C620_P2SB 0xa1a0
duplicates PCI_DEVICE_ID_INTEL_LWB_P2SB
Ack
Maxim Polyakov has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
Patch Set 5: Code-Review+2
David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
Patch Set 5: Code-Review+2
Patch Set 5:
(8 comments)
Patch Set 5: Code-Review+1
Patch Set 1:
Though I will believe to rename to LBG will be better than LWB as that will match with Linux kernel.
I'd suggest using LBG if it's the official name
If everyone agrees, I can rename LWB to LBG. Or we will get this patch in, and do the rename in a sweep at a later time.
Agreed, let's do the sweep a later time and update all the instances of LWB at once.
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/37215 )
Change subject: pci_ids: Update Intel Lewisburg SMBUS PCI ID ......................................................................
pci_ids: Update Intel Lewisburg SMBUS PCI ID
Change PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS to PCI_DEVICE_ID_INTEL_LWB_SMBUS.
Ideally the abbreviation for Lewisburg should be LBG instead of LWB. However, LWB is used for consistency.
Signed-off-by: Jonathan Zhang jonzhang@fb.com Signed-off-by: Anjaneya (Reddy) Chagam anjaneya.chagam@intel.com Change-Id: Ibc0cb6f2f7eb337180c2ae89015953a9aeaed68b Reviewed-on: https://review.coreboot.org/c/coreboot/+/37215 Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Maxim Polyakov max.senia.poliak@gmail.com Reviewed-by: David Hendricks david.hendricks@gmail.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/include/device/pci_ids.h M src/soc/intel/common/block/smbus/smbus.c 2 files changed, 2 insertions(+), 2 deletions(-)
Approvals: build bot (Jenkins): Verified David Hendricks: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve Maxim Polyakov: Looks good to me, approved
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index c05640f..0f96737 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3323,7 +3323,7 @@ /* Intel SMBUS device Ids */ #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS 0x9d23 #define PCI_DEVICE_ID_INTEL_SPT_H_SMBUS 0xa123 -#define PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS 0xa1a3 +#define PCI_DEVICE_ID_INTEL_LWB_SMBUS 0xa1a3 #define PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER 0xa223 #define PCI_DEVICE_ID_INTEL_CNL_SMBUS 0x9da3 #define PCI_DEVICE_ID_INTEL_CNP_H_SMBUS 0xa323 diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 56f54d7..d7114e4 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -92,7 +92,7 @@ PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS, PCI_DEVICE_ID_INTEL_SPT_H_SMBUS, PCI_DEVICE_ID_INTEL_LWB_SMBUS_SUPER, - PCI_DEVICE_ID_INTEL_KBP_H_LWB_SMBUS, + PCI_DEVICE_ID_INTEL_LWB_SMBUS, PCI_DEVICE_ID_INTEL_ICP_LP_SMBUS, PCI_DEVICE_ID_INTEL_CMP_SMBUS, PCI_DEVICE_ID_INTEL_TGP_LP_SMBUS,
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Angel Pons (Code Review) -
David Hendricks (Code Review)
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Jonathan Zhang (Code Review)
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Lance Zhao (Code Review)
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Maxim Polyakov (Code Review)
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Patrick Georgi (Code Review)