Change in coreboot[master]: soc/amd/cezanne: Enable early LPC support in bootblock stage

[Raul Rangel (Code Review)]

Attention is currently required from: Bao Zheng, Jason Glenesk, Marshall Dawson, Zheng Bao, Felix Held.
Raul Rangel has uploaded a new patch set (#10) to the change originally created by Bao Zheng. ( https://review.coreboot.org/c/coreboot/+/49929 )

Change subject: soc/amd/cezanne: Enable early LPC support in bootblock stage
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soc/amd/cezanne: Enable early LPC support in bootblock stage

Signed-off-by: Zheng Bao 
Signed-off-by: Raul E Rangel 
Change-Id: I739d97ddc5afd84a4bbc7e505b423158eb820767
---
M src/soc/amd/cezanne/Kconfig
M src/soc/amd/cezanne/early_fch.c
A src/soc/amd/cezanne/include/soc/acpi.h
M src/soc/amd/cezanne/include/soc/iomap.h
M src/soc/amd/cezanne/include/soc/southbridge.h
5 files changed, 27 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/49929/10