the following patch was just integrated into master: commit 83fd23925509026734833c9d8d28890029899458 Author: David Hendricks dhendrix@chromium.org Date: Fri Jun 14 19:16:56 2013 -0700
exynos5420: update I2C code, add HSI2C/USI support
This updates the low-level I2C code to handle the new high-speed HSI2C/USI inteface. It also outputs a bit more error information when things go wrong. Also adds some more error prints. Timeouts really need to be noted.
In hsi2c_wait_for_irq, order the delay so that we do an initial sleep first to avoid an early-test that was kicking us out of the test too soon. We got to the test before the hardware was ready for us. Finally, test clearing the interrupt status register every time we wait for it on the write. Works.
Change-Id: I69500eedad58ae0c6405164fbeee89b6a4c6ec6c Signed-off-by: Ronald G. Minnich rminnich@google.com Signed-off-by: David Hendricks dhendrix@chromium.org Signed-off-by: Gabe Black gabeblack@chromium.org Reviewed-on: http://review.coreboot.org/3681 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer stefan.reinauer@coreboot.org
See http://review.coreboot.org/3681 for details.
-gerrit