Change in coreboot[master]: mb/google/zork/ezkinil: Increase eMMC initial clock frequency
Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/ezkinil: Increase eMMC initial clock frequency
This will reduce boot time by over 30ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Ezkinil w/ eMMC to OS.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ida0bbf9bd772ab7d384d5d097fa3b02b846a3efa --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/45852/1
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index 614d6ab..b0204de 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -39,6 +39,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 1: Code-Review+1
Rob Barnes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 1:
/cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:349:4: error: 'struct <anonymous>' has no member named 'sdr104_hs400_driver_strength' .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:349:35: error: 'SD_EMMC_DRIVE_STRENGTH_A' undeclared here (not in a function) .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, ^~~~~~~~~~~~~~~~~~~~~~~~ /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:349:35: error: excess elements in struct initializer [-Werror] /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:349:35: note: (near initialization for 'soc_amd_picasso_info_1.emmc_config') /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:350:4: error: 'struct <anonymous>' has no member named 'init_khz_preset' .init_khz_preset = 400, ^~~~~~~~~~~~~~~ /cb-build/coreboot-gerrit.0/chromeos/GOOGLE_EZKINIL/mainboard/google/zork/static.c:350:22: error: excess elements in struct initializer [-Werror] .init_khz_preset = 400, ^~~
Hello build bot (Jenkins), Martin Roth, Rob Barnes, Eric Peers, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/45852
to look at the new patch set (#3).
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/ezkinil: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Ezkinil w/ eMMC to OS.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ida0bbf9bd772ab7d384d5d097fa3b02b846a3efa --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/45852/3
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Eric Peers has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+1
Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
Patch Set 3: Code-Review+2
Paul Fagerburg has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45852 )
Change subject: mb/google/zork/ezkinil: Increase eMMC initial clock frequency ......................................................................
mb/google/zork/ezkinil: Increase eMMC initial clock frequency
This will reduce boot time by 7ms. Some of the initial designs don't have a pull-up resistor on the CMD line. These designs still boot at 400 kHz despite not having the pull-up.
BUG=b:158766134 TEST=Boot Ezkinil w/ eMMC to OS.
Signed-off-by: Raul E Rangel rrangel@chromium.org Change-Id: Ida0bbf9bd772ab7d384d5d097fa3b02b846a3efa Reviewed-on: https://review.coreboot.org/c/coreboot/+/45852 Reviewed-by: Furquan Shaikh furquan@google.com Reviewed-by: Martin Roth martinroth@google.com Reviewed-by: Eric Peers epeers@google.com Reviewed-by: Paul Fagerburg pfagerburg@chromium.org Reviewed-by: Rob Barnes robbarnes@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/zork/variants/ezkinil/overridetree.cb 1 file changed, 6 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved Furquan Shaikh: Looks good to me, approved Paul Fagerburg: Looks good to me, approved Eric Peers: Looks good to me, but someone else must approve Rob Barnes: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index 26af394..5ef2f0a 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -44,6 +44,12 @@ .early_init = true, }"
+ register "emmc_config" = "{ + .timing = SD_EMMC_EMMC_HS400, + .sdr104_hs400_driver_strength = SD_EMMC_DRIVE_STRENGTH_A, + .init_khz_preset = 400, + }" + # See AMD 55570-B1 Table 13: PCI Device ID Assignments. device domain 0 on subsystemid 0x1022 0x1510 inherit
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Eric Peers (Code Review) -
Furquan Shaikh (Code Review)
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Martin Roth (Code Review)
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Paul Fagerburg (Code Review)
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Raul Rangel (Code Review)
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Rob Barnes (Code Review)