Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/27015
Change subject: src: Move constant to the right side of comparison ......................................................................
src: Move constant to the right side of comparison
Change-Id: I76d35a3643600f81a6da7e0af99c935ebd1c2fc7 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- M src/device/pci_rom.c M src/northbridge/amd/agesa/family16kb/state_machine.c M src/northbridge/amd/amdmct/mct/mctardk4.c M src/southbridge/amd/cimx/sb800/late.c 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/27015/1
diff --git a/src/device/pci_rom.c b/src/device/pci_rom.c index 35d3d69..7bc18a1 100644 --- a/src/device/pci_rom.c +++ b/src/device/pci_rom.c @@ -151,7 +151,7 @@ * whether the ROM image is for a VGA device because some * devices have a mismatch between the hardware and the ROM. */ - if (PCI_CLASS_DISPLAY_VGA == (dev->class >> 8)) { + if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { #if !IS_ENABLED(CONFIG_MULTIPLE_VGA_ADAPTERS) extern struct device *vga_pri; /* Primary VGA device (device.c). */ if (dev != vga_pri) return NULL; /* Only one VGA supported. */ diff --git a/src/northbridge/amd/agesa/family16kb/state_machine.c b/src/northbridge/amd/agesa/family16kb/state_machine.c index 00a7e85..39f7a29 100644 --- a/src/northbridge/amd/agesa/family16kb/state_machine.c +++ b/src/northbridge/amd/agesa/family16kb/state_machine.c @@ -34,7 +34,7 @@
if (IS_ENABLED(CONFIG_ENABLE_MRC_CACHE)) { status = OemInitResume(&Post->MemConfig.MemContext); - if (AGESA_SUCCESS == status) + if (status == AGESA_SUCCESS) Post->MemConfig.MemRestoreCtl = 1; } } diff --git a/src/northbridge/amd/amdmct/mct/mctardk4.c b/src/northbridge/amd/amdmct/mct/mctardk4.c index f7a4bee..d112c46 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk4.c +++ b/src/northbridge/amd/amdmct/mct/mctardk4.c @@ -146,6 +146,6 @@ } } p+=10; - } while (0xFF == *p); + } while (*p == 0xff); } } diff --git a/src/southbridge/amd/cimx/sb800/late.c b/src/southbridge/amd/cimx/sb800/late.c index 30cddb2..45011b8 100644 --- a/src/southbridge/amd/cimx/sb800/late.c +++ b/src/southbridge/amd/cimx/sb800/late.c @@ -387,7 +387,7 @@
case PCI_DEVFN(0x14, 2): /* 0:14:2 HDA */ if (dev->enabled) { - if (AZALIA_DISABLE == sb_config->AzaliaController) { + if (sb_config->AzaliaController == AZALIA_DISABLE) { sb_config->AzaliaController = AZALIA_AUTO; } } else {