New patch to review for coreboot: 0ba28d6 northbridge/intel/e7505/raminit.c: Silence warn of unused func

[Edward O'Callaghan]

Edward O'Callaghan ([e-mail]) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5845

-gerrit

commit 0ba28d64f750e755b60673ecb8b7a2942bb461b7
Author: Edward O'Callaghan 
Date:   Sun May 25 06:33:29 2014 +1000

northbridge/intel/e7505/raminit.c: Silence warn of unused func

Spotted by Clang.

Change-Id: Iec34a23d0cf193ca6a4af0407b0763bf77ea03b3
    Signed-off-by: Edward O'Callaghan 
---
 src/northbridge/intel/e7505/raminit.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 455f3ab..e5920df 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -104,6 +104,7 @@ static const uint32_t refresh_rate_map[] = {

#define MAX_SPD_REFRESH_RATE ((sizeof(refresh_rate_map) / sizeof(uint32_t)) - 1)

+#ifdef VALIDATE_DIMM_COMPATIBILITY
 // SPD parameters that must match for dual-channel operation
 static const uint8_t dual_channel_parameters[] = {
    SPD_MEMORY_TYPE,
@@ -114,6 +115,7 @@ static const uint8_t dual_channel_parameters[] = {
    SPD_PRIMARY_SDRAM_WIDTH,
    SPD_NUM_BANKS_PER_SDRAM
 };
+#endif /* VALIDATE_DIMM_COMPATIBILITY */

/* Comments here are remains of e7501 or even 855PM.
     * They might be partially (in)correct for e7505.
@@ -623,7 +625,7 @@ static uint8_t spd_get_supported_dimms(const struct mem_controller *ctrl)
    			break;
    		}
    	}
-#endif
+#endif /* VALIDATE_DIMM_COMPATIBILITY */

// Code around ROMCC bug in optimization of "if" statements
 #ifdef ROMCC_IF_BUG_FIXED