Change in coreboot[master]: drivers/intel/fsp2_0: Add preload_fspm and preload_fsps

[Raul Rangel (Code Review)]

Raul Rangel has submitted this change. ( https://review.coreboot.org/c/coreboot/+/58987 )

Change subject: drivers/intel/fsp2_0: Add preload_fspm and preload_fsps
......................................................................

drivers/intel/fsp2_0: Add preload_fspm and preload_fsps

In the non-XIP world, FSP is normally memmapped and then decompressed.
The AMD SPI DMA controller can actually read faster than mmap. So by
reading the contents into a buffer and then decompressing we reduce boot
time.

BUG=b:179699789
TEST=Boot guybrush and see 30ms reduction in boot time

Signed-off-by: Raul E Rangel 
Change-Id: I28d7530ae9e50f743e3d6c86a5a29b1fa85cacb6
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58987
Tested-by: build bot (Jenkins) 
Reviewed-by: Tim Wawrzynczak 
---
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/memory_init.c
M src/drivers/intel/fsp2_0/silicon_init.c
3 files changed, 20 insertions(+), 0 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Tim Wawrzynczak: Looks good to me, approved

diff --git a/src/drivers/intel/fsp2_0/include/fsp/api.h b/src/drivers/intel/fsp2_0/include/fsp/api.h
index 68b8470..c035452 100644
--- a/src/drivers/intel/fsp2_0/include/fsp/api.h
+++ b/src/drivers/intel/fsp2_0/include/fsp/api.h
@@ -32,7 +32,9 @@
 };

/* Main FSP stages */
+void preload_fspm(void);
 void fsp_memory_init(bool s3wake);
+void preload_fsps(void);
 void fsp_silicon_init(void);

/*
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 0c9fe97..c1a7377 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -340,6 +340,15 @@
    return (void *)fspm_begin;
 }

+void preload_fspm(void)
+{
+	if (!CONFIG(CBFS_PRELOAD))
+		return;
+
+	printk(BIOS_DEBUG, "Preloading %s\n", CONFIG_FSP_M_CBFS);
+	cbfs_preload(CONFIG_FSP_M_CBFS);
+}
+
 void fsp_memory_init(bool s3wake)
 {
    struct range_entry prog_ranges[2];
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c
index b3e60c2..83d44b1 100644
--- a/src/drivers/intel/fsp2_0/silicon_init.c
+++ b/src/drivers/intel/fsp2_0/silicon_init.c
@@ -230,6 +230,15 @@
    load_done = 1;
 }

+void preload_fsps(void)
+{
+	if (!CONFIG(CBFS_PRELOAD))
+		return;
+
+	printk(BIOS_DEBUG, "Preloading %s\n", CONFIG_FSP_S_CBFS);
+	cbfs_preload(CONFIG_FSP_S_CBFS);
+}
+
 void fsp_silicon_init(void)
 {
    timestamp_add_now(TS_FSP_SILICON_INIT_LOAD);