Change in coreboot[master]: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2

[Felix Held (Code Review)]

Hello Raul Rangel,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/39885

to review the following change.

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2

Change-Id: I35a1c404ff2f381d3d6bf4f2e4bbbf5429db38c3
Signed-off-by: Martin Roth 
Reviewed-on: https://chromium-review.googlesource.com/1961485
Reviewed-on: https://chromium-review.googlesource.com/2060905
Reviewed-by: Raul E Rangel 
---
M src/soc/amd/picasso/cpu.c
M src/soc/amd/picasso/include/soc/cpu.h
2 files changed, 5 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/39885/1

diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index c7e847d..6044688 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -128,8 +128,8 @@

static struct cpu_device_id cpu_table[] = {
    { X86_VENDOR_AMD, 0x810f80 },
-	{ X86_VENDOR_AMD, 0x810f81 },
-	{ X86_VENDOR_AMD, 0x820f01 },
+	{ X86_VENDOR_AMD, PICASSO_CPUID },
+	{ X86_VENDOR_AMD, RAVEN2_CPUID },
    { 0, 0 },
 };

diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h
index 2bcffdc..c53829d 100644
--- a/src/soc/amd/picasso/include/soc/cpu.h
+++ b/src/soc/amd/picasso/include/soc/cpu.h
@@ -23,4 +23,7 @@
 int get_cpu_count(void);
 void check_mca(void);

+#define PICASSO_CPUID			0x00810f81
+#define RAVEN2_CPUID			0x00820f01
+
 #endif /* __PICASSO_CPU_H__ */

[Raul Rangel (Code Review)]

Raul Rangel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 1: Code-Review+2

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 1: Code-Review+2

I wonder what the first CPUID is for

[Felix Held (Code Review)]

Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 1:
> Patch Set 1: Code-Review+2
>
> I wonder what the first CPUID is for

the last nibble is the stepping ID, so this is an earlier stepping of picasso

[Angel Pons (Code Review)]

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 1:
> Patch Set 1:
> > Patch Set 1: Code-Review+2
> >
> > I wonder what the first CPUID is for
>
> the last nibble is the stepping ID, so this is an earlier stepping of picasso

True, it's probably an early silicon revision like I've seen everywhere else

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 1: Code-Review+1

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2

Change-Id: I35a1c404ff2f381d3d6bf4f2e4bbbf5429db38c3
Signed-off-by: Martin Roth 
Reviewed-on: https://chromium-review.googlesource.com/1961485
Reviewed-on: https://chromium-review.googlesource.com/2060905
Reviewed-by: Raul E Rangel 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39885
Tested-by: build bot (Jenkins) 
Reviewed-by: Raul Rangel 
Reviewed-by: Angel Pons 
Reviewed-by: Paul Menzel 
---
M src/soc/amd/picasso/cpu.c
M src/soc/amd/picasso/include/soc/cpu.h
2 files changed, 5 insertions(+), 2 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Paul Menzel: Looks good to me, but someone else must approve
  Raul Rangel: Looks good to me, approved
  Angel Pons: Looks good to me, approved

diff --git a/src/soc/amd/picasso/cpu.c b/src/soc/amd/picasso/cpu.c
index c7e847d..6044688 100644
--- a/src/soc/amd/picasso/cpu.c
+++ b/src/soc/amd/picasso/cpu.c
@@ -128,8 +128,8 @@

static struct cpu_device_id cpu_table[] = {
    { X86_VENDOR_AMD, 0x810f80 },
-	{ X86_VENDOR_AMD, 0x810f81 },
-	{ X86_VENDOR_AMD, 0x820f01 },
+	{ X86_VENDOR_AMD, PICASSO_CPUID },
+	{ X86_VENDOR_AMD, RAVEN2_CPUID },
    { 0, 0 },
 };

diff --git a/src/soc/amd/picasso/include/soc/cpu.h b/src/soc/amd/picasso/include/soc/cpu.h
index 2bcffdc..c53829d 100644
--- a/src/soc/amd/picasso/include/soc/cpu.h
+++ b/src/soc/amd/picasso/include/soc/cpu.h
@@ -23,4 +23,7 @@
 int get_cpu_count(void);
 void check_mca(void);

+#define PICASSO_CPUID			0x00810f81
+#define RAVEN2_CPUID			0x00820f01
+
 #endif /* __PICASSO_CPU_H__ */

[9elements QA (Code Review)]

9elements QA has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39885 )

Change subject: soc/amd/picasso: Add and use CPUID defines for Picasso and Raven2
......................................................................

Patch Set 2:

Automatic boot test returned (PASS/FAIL/TOTAL): 5/0/5
Emulation targets:
EMULATION_QEMU_X86_Q35 using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1885
EMULATION_QEMU_X86_Q35 using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1884
EMULATION_QEMU_X86_I440FX using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1883
Non-emulation targets:
HP_COMPAQ_8200_ELITE_SFF_PC using payload TianoCore : SUCCESS : https://lava.9esec.io/r/1887
HP_COMPAQ_8200_ELITE_SFF_PC using payload SeaBIOS : SUCCESS : https://lava.9esec.io/r/1886

Please note: This test is under development and might not be accurate at all!