[L] Change in coreboot[main]: soc/intel/xeon_sp: Unshare Xeon-SP chip common codes

[Martin L Roth (Code Review)]

Attention is currently required from: Arthur Heymans, Christian Walter, David Hendricks, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Shuo Liu, TangYiwei, Tim Chu.

Martin L Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81312?usp=email )

Change subject: soc/intel/xeon_sp: Unshare Xeon-SP chip common codes
......................................................................

Patch Set 1:

(1 comment)

File src/soc/intel/xeon_sp/chip_fsp20.c:

https://review.coreboot.org/c/coreboot/+/81312/comment/cd917dc3_7ade4c01 :
PS1, Line 185: #endif //CONFIG(SOC_INTEL_HAS_CXL)
> `adding a line without newline at end of file`

Please fix. This is causing all of the following patches to fail.

Check that files end with a single newline (lint-extended-015-final-newlines): src/soc/intel/xeon_sp/chip_fsp20.c has no final newline.
test failed