Change in coreboot[master]: src/cpu/x86/mtrr: Convert to 96 characters line length

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44309 )

Change subject: src/cpu/x86/mtrr: Convert to 96 characters line length
......................................................................

src/cpu/x86/mtrr: Convert to 96 characters line length

Change-Id: I2525c2f3cbdd7b7137c3b60ad8a44ed6ebdb8909
Signed-off-by: Elyes HAOUAS 
---
M src/cpu/x86/mtrr/debug.c
1 file changed, 12 insertions(+), 22 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/44309/1

diff --git a/src/cpu/x86/mtrr/debug.c b/src/cpu/x86/mtrr/debug.c
index 4ecae06..f7eb97e 100644
--- a/src/cpu/x86/mtrr/debug.c
+++ b/src/cpu/x86/mtrr/debug.c
@@ -18,8 +18,8 @@
    }
 }

-static void display_mtrr_fixed_types(uint64_t msr,
-	uint32_t starting_address, uint32_t memory_size)
+static void display_mtrr_fixed_types(uint64_t msr, uint32_t starting_address,
+				     uint32_t memory_size)
 {
    uint32_t base_address;
    uint32_t index;
@@ -31,25 +31,21 @@
    base_address = starting_address;
    next_address = base_address;
    for (index = 0; index < 64; index += 8) {
-		next_address = starting_address + (memory_size *
-			((index >> 3) + 1));
+		next_address = starting_address + (memory_size * ((index >> 3) + 1));
    	next_type = (msr >> index) & MTRR_DEF_TYPE_MASK;
    	if (next_type != type) {
    		printk(BIOS_DEBUG, "    0x%08x - 0x%08x: %s\n",
-				base_address, next_address - 1,
-				display_mtrr_type(type));
+				base_address, next_address - 1, display_mtrr_type(type));
    		base_address = next_address;
    		type = next_type;
    	}
    }
    if (base_address != next_address)
-		printk(BIOS_DEBUG, "    0x%08x - 0x%08x: %s\n",
-			base_address, next_address - 1,
+		printk(BIOS_DEBUG, "    0x%08x - 0x%08x: %s\n", base_address, next_address - 1,
    		display_mtrr_type(type));
 }

-static void display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address,
-	const char *name)
+static void display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address, const char *name)
 {
    union {
    	uint64_t u64;
@@ -61,8 +57,7 @@
    display_mtrr_fixed_types(msr.u64, starting_address, 0x1000);
 }

-static void display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address,
-	const char *name)
+static void display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address, const char *name)
 {
    union {
    	uint64_t u64;
@@ -91,8 +86,7 @@
    msr_t msr;

msr = rdmsr(MTRR_CAP_MSR);
-	printk(BIOS_DEBUG,
-		"0x%08x%08x: IA32_MTRRCAP: %s%s%s%s%u variable MTRRs\n",
+	printk(BIOS_DEBUG, "0x%08x%08x: IA32_MTRRCAP: %s%s%s%s%u variable MTRRs\n",
    	msr.hi, msr.lo,
    	(msr.lo & MTRR_CAP_PRMRR) ? "PRMRR, " : "",
    	(msr.lo & MTRR_CAP_SMRR) ? "SMRR, " : "",
@@ -113,8 +107,7 @@
    	msr.u64,
    	(msr.u64 & MTRR_DEF_TYPE_EN) ? " E," : "",
    	(msr.u64 & MTRR_DEF_TYPE_FIX_EN) ? " FE," : "",
-		display_mtrr_type((uint32_t)(msr.u64 &
-			MTRR_DEF_TYPE_MASK)));
+		display_mtrr_type((uint32_t)(msr.u64 & MTRR_DEF_TYPE_MASK)));
 }

static void display_variable_mtrr(int index, uint64_t address_mask)
@@ -137,19 +130,16 @@
    if (msr_m.u64 & MTRR_PHYS_MASK_VALID) {
    	base_address = (msr_a.u64 & 0xfffffffffffff000ULL)
    		& address_mask;
-		printk(BIOS_DEBUG,
-			"0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",
+		printk(BIOS_DEBUG, "0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",
    		msr_a.u64, index, base_address,
    		display_mtrr_type(msr_a.u64 & MTRR_DEF_TYPE_MASK));
    	mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask;
    	length = (~mask & address_mask) + 1;
-		printk(BIOS_DEBUG,
-			"0x%016llx: PHYMASK%d: Length  = 0x%016llx, Valid\n",
+		printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Length  = 0x%016llx, Valid\n",
    		msr_m.u64, index, length);
    } else {
    	printk(BIOS_DEBUG, "0x%016llx: PHYBASE%d\n", msr_a.u64, index);
-		printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Disabled\n",
-			msr_m.u64, index);
+		printk(BIOS_DEBUG, "0x%016llx: PHYMASK%d: Disabled\n", msr_m.u64, index);
    }
 }

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/44309 )

Change subject: src/cpu/x86/mtrr: Convert to 96 characters line length
......................................................................

src/cpu/x86/mtrr: Convert to 96 characters line length

Change-Id: I2525c2f3cbdd7b7137c3b60ad8a44ed6ebdb8909
Signed-off-by: Elyes HAOUAS 
---
M src/cpu/x86/mtrr/debug.c
M src/cpu/x86/mtrr/earlymtrr.c
M src/cpu/x86/mtrr/mtrr.c
M src/cpu/x86/mtrr/xip_cache.c
4 files changed, 118 insertions(+), 167 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/44309/2

[build bot (Jenkins) (Code Review)]

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44309 )

Change subject: src/cpu/x86/mtrr: Convert to 96 characters line length
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Patch Set 2:

(3 comments)

https://review.coreboot.org/c/coreboot/+/44309/2/src/cpu/x86/mtrr/mtrr.c 
File src/cpu/x86/mtrr/mtrr.c:

https://review.coreboot.org/c/coreboot/+/44309/2/src/cpu/x86/mtrr/mtrr.c@503 
PS2, Line 503: 		calc_var_mtrr_range(&var_state, base, hole_end - base, dont_care);
'dont' may be misspelled - perhaps 'don't'?

https://review.coreboot.org/c/coreboot/+/44309/2/src/cpu/x86/mtrr/mtrr.c@505 
PS2, Line 505: 			calc_var_mtrr_range(&var_state, hole, hole_end - hole, dont_care);
'dont' may be misspelled - perhaps 'don't'?

https://review.coreboot.org/c/coreboot/+/44309/2/src/cpu/x86/mtrr/mtrr.c@710 
PS2, Line 710: 		printk(BIOS_WARNING, "Not enough MTRRs: %d vs %d\n", sol->num_used, total_mtrrs);
line over 96 characters

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/44309 )

Change subject: src/cpu/x86/mtrr: Convert to 96 characters line length
......................................................................

Abandoned