[M] Change in coreboot[main]: soc/intel/common/block/pmc: Add GPE1 functions

[Cliff Huang (Code Review)]

Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik.

Cliff Huang has posted comments on this change by Cliff Huang. ( https://review.coreboot.org/c/coreboot/+/84104?usp=email )

Change subject: soc/intel/common/block/pmc: Add GPE1 functions
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Patch Set 7:

(2 comments)

File src/soc/intel/common/block/pmc/pmclib.c:

https://review.coreboot.org/c/coreboot/+/84104/comment/cb61e844_616fc68a?usp... :
PS7, Line 25: #if !CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)
            : 
            : /* NOTE: For platform doesn't have support for GPE1, adding dummy entries here for common code
            :  */
            : #ifndef GPE1_STS
            : #define GPE1_STS(x) (0x0 + ((x) * 4))
            : #endif
            : #ifndef GPE1_REG_MAX
            : #define GPE1_REG_MAX 0
            : #endif
            : 
            : #endif
> we should avoid defining it across multiple files. […]

The defines is moved to src/soc/intel/common/block/include/intelblocks/pmclib.h in https://review.coreboot.org/c/coreboot/+/84103/7

https://review.coreboot.org/c/coreboot/+/84104/comment/c30e4a9b_1f51ac48?usp... :
PS7, Line 341: pmc_clear_gpi_gpe0_status
> can I request you to perform this renaming as part of the base CL and mention the motivation about w […]

sure. working on this.