Attention is currently required from: Anil Kumar K, Bora Guvendik, Hannah Williams, Jamie Ryu, Subrata Banik.

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2 comments:

• File src/soc/intel/common/block/pmc/pmclib.c:

  • Patch Set #7, Line 25:

    #if !CONFIG(SOC_INTEL_COMMON_BLOCK_ACPI_USE_GPE1)
    
    /* NOTE: For platform doesn't have support for GPE1, adding dummy entries here for common code
     */
    #ifndef GPE1_STS
    #define GPE1_STS(x) (0x0 + ((x) * 4))
    #endif
    #ifndef GPE1_REG_MAX
    #define GPE1_REG_MAX 0
    #endif
    
    #endif
    

    we should avoid defining it across multiple files. […]

    The defines is moved to src/soc/intel/common/block/include/intelblocks/pmclib.h in https://review.coreboot.org/c/coreboot/+/84103/7

  • Patch Set #7, Line 341: pmc_clear_gpi_gpe0_status

    can I request you to perform this renaming as part of the base CL and mention the motivation about w […]

    sure. working on this.

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