Change in coreboot[master]: trogdor: Explicitly initialize display pins in bootblock

[Julius Werner (Code Review)]

Attention is currently required from: Shelley Chen, Douglas Anderson, mturney mturney.
Hello Shelley Chen, Douglas Anderson, mturney mturney,

I'd like you to do a code review. Please visit

https://review.coreboot.org/c/coreboot/+/49810

to review the following change.

Change subject: trogdor: Explicitly initialize display pins in bootblock
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trogdor: Explicitly initialize display pins in bootblock

This patch adds explicit initializations for the remaining named display
(power) control GPIOs to the bootblock GPIO init code. These pins are
usually mapped to pins that are already configured to pull-downs on
power-on reset so this wasn't really required, but we have already moved
them around so often that you never know when EEs might one day move
them to a pin with a different power-on reset configuration, so it's
better to be explicit.

In one particular case, GPIO(67) (used by CoachZ rev1+ but not by
anything else for the EN_PP3300_DX_EDP pin) is not actually a pull-down
on boot, even though that is claimed by the datasheet. This is likely
due to the fact that it can serve as the SPI_HOLD pin for the boot flash
QSPI bus, so even though our board's boot flash doesn't really use that
pin, it seems that the boot ROM still configures it as such.

Signed-off-by: Julius Werner 
Change-Id: I533baa962d2dfc87cfa510f442ed2e8912e0e5b0
---
M src/mainboard/google/trogdor/chromeos.c
1 file changed, 2 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/49810/1

diff --git a/src/mainboard/google/trogdor/chromeos.c b/src/mainboard/google/trogdor/chromeos.c
index e93432f..d6b1836 100644
--- a/src/mainboard/google/trogdor/chromeos.c
+++ b/src/mainboard/google/trogdor/chromeos.c
@@ -13,6 +13,8 @@
    gpio_input_irq(GPIO_H1_AP_INT, IRQ_TYPE_RISING_EDGE, GPIO_PULL_UP);
    gpio_output(GPIO_AMP_ENABLE, 0);
    gpio_output(GPIO_BACKLIGHT_ENABLE, 0);
+	gpio_output(GPIO_EN_PP3300_DX_EDP, 0);
+	gpio_output(GPIO_EDP_BRIDGE_ENABLE, 0);
 }

void fill_lb_gpios(struct lb_gpios *gpios)