Change in coreboot[master]: soc/amd/cezanne/early_fch: Perform early SPI initialization

[Felix Held (Code Review)]

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/56684 )

Change subject: soc/amd/cezanne/early_fch: Perform early SPI initialization
......................................................................

soc/amd/cezanne/early_fch: Perform early SPI initialization

Add the fch_spi_early_init call in fch_pre_init to perform early SPI
initialization which enables SPI ROM and setting the speed & read modes.

BUG=b:194919326
TEST=Build and boot to OS in Guybrush.

Change-Id: Ibfbe6e16bd6b0dd46c13cecf2a35f0c0b4576b88
Signed-off-by: Karthikeyan Ramasubramanian 
Signed-off-by: Felix Held 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56684
Reviewed-by: Martin Roth 
Tested-by: build bot (Jenkins) 
---
M src/soc/amd/cezanne/early_fch.c
1 file changed, 1 insertion(+), 1 deletion(-)

Approvals:
  build bot (Jenkins): Verified
  Martin Roth: Looks good to me, approved
  Felix Held: Looks good to me, approved
  Karthik Ramasubramanian: Looks good to me, approved

diff --git a/src/soc/amd/cezanne/early_fch.c b/src/soc/amd/cezanne/early_fch.c
index 5d268bc..9da154c 100644
--- a/src/soc/amd/cezanne/early_fch.c
+++ b/src/soc/amd/cezanne/early_fch.c
@@ -44,7 +44,7 @@
 void fch_pre_init(void)
 {
    lpc_early_init();
-
+	fch_spi_early_init();
    enable_acpimmio_decode_pm04();
    fch_smbus_init();
    fch_enable_cf9_io();