[M] Change in coreboot[main]: soc/intel: Add check to pmc_/gpe0_different_values

[Jérémy Compostella (Code Review)]

Attention is currently required from: Dinesh Gehlot, Eran Mitrani, Eric Lai, Intel coreboot Reviewers, Jakub Czapiga, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Pranava Y N, Sean Rhodes, Subrata Banik, Tarun, Werner Zeh.

Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86164?usp=email )

Change subject: soc/intel: Add check to pmc_/gpe0_different_values
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/86164/comment/bffab20e_506390ec?usp... :
PS2, Line 14: This prevents potential issues arising from a zeroed configuration
> The commit message still needs some update.

The commit message still needs some update in my opinion:
1. the describe logic is wrong and not aligned with the code
2. It does not really explain the issue being fixed
3. It should probably point out to https://review.coreboot.org/c/coreboot/+/85161