Change in coreboot[master]: soc/intel: Abstract the common block API for TCSS registers access

[John Zhao (Code Review)]

Attention is currently required from: Wonkyu Kim, Subrata Banik, Tim Wawrzynczak, Nick Vaccaro, Angel Pons, Patrick Rudolph.
John Zhao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/60989 )

Change subject: soc/intel: Abstract the common block API for TCSS registers access
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Patch Set 13:

(1 comment)

File src/soc/intel/common/block/usb4/usb4.c:

https://review.coreboot.org/c/coreboot/+/60989/comment/0dd157a8_bba8e1d8 
PS13, Line 32: tcss_valid_tbt_auth
> wondering if USB4 common code has dependency over tcss/tcss. […]

USB4 common code already has a few Kconfig for the generic SSDT. IMR is only one feature which would need to be determined differently across platforms(ADL/MTL/TGL, etc) through the tcss_valid_tbt_auth().

CpuPcieRpEnableMask is not relevant here for USB4 and is applicable all the way through devicetree->fsp programming the IOM_TCSS_DEVEN regsiter. After booting to kernel, Coreboot acpi code fetches the above register setting and informs kernel about TypeC ports availability through the _STA method.