Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36585 )
Change subject: cpu/x86/mtrr/xip_cache.c: Fix inconsistent message ......................................................................
cpu/x86/mtrr/xip_cache.c: Fix inconsistent message
Change-Id: Ic99e61632664f86cc12507f2ddffa364fdd79202 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/cpu/x86/mtrr/xip_cache.c 1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/36585/1
diff --git a/src/cpu/x86/mtrr/xip_cache.c b/src/cpu/x86/mtrr/xip_cache.c index 112c0dfb..9968eea 100644 --- a/src/cpu/x86/mtrr/xip_cache.c +++ b/src/cpu/x86/mtrr/xip_cache.c @@ -63,7 +63,7 @@ if (cpu_info.x86 == 0xf) { printk(BIOS_NOTICE, "PROG_RUN: CPU does not support caching ROM\n" - "The next stage will run slowly\n"); + "The next stage will run slowly!\n"); return; }
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36585 )
Change subject: cpu/x86/mtrr/xip_cache.c: Fix inconsistent message ......................................................................
Patch Set 1: Code-Review+2
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36585 )
Change subject: cpu/x86/mtrr/xip_cache.c: Fix inconsistent message ......................................................................
Patch Set 1: Code-Review+2
Nico Huber has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36585 )
Change subject: cpu/x86/mtrr/xip_cache.c: Fix inconsistent message ......................................................................
cpu/x86/mtrr/xip_cache.c: Fix inconsistent message
Change-Id: Ic99e61632664f86cc12507f2ddffa364fdd79202 Signed-off-by: Angel Pons th3fanbus@gmail.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/36585 Reviewed-by: Nico Huber nico.h@gmx.de Reviewed-by: Arthur Heymans arthur@aheymans.xyz Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/x86/mtrr/xip_cache.c 1 file changed, 1 insertion(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Nico Huber: Looks good to me, approved Arthur Heymans: Looks good to me, approved
diff --git a/src/cpu/x86/mtrr/xip_cache.c b/src/cpu/x86/mtrr/xip_cache.c index 112c0dfb..9968eea 100644 --- a/src/cpu/x86/mtrr/xip_cache.c +++ b/src/cpu/x86/mtrr/xip_cache.c @@ -63,7 +63,7 @@ if (cpu_info.x86 == 0xf) { printk(BIOS_NOTICE, "PROG_RUN: CPU does not support caching ROM\n" - "The next stage will run slowly\n"); + "The next stage will run slowly!\n"); return; }
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Angel Pons (Code Review) -
Arthur Heymans (Code Review)
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Nico Huber (Code Review)