Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable IPU 2. enable VARIANT_HAS_CAMERA_ACPI 3. add VCM/NVM asl code
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name A src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/cam1.asl A src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/camera.asl A src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_endpoints.asl A src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_mainboard.asl M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 6 files changed, 455 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/1
diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 40738a0..5924ac1 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -20,6 +20,7 @@ select BOARD_GOOGLE_BASEBOARD_DEDEDE select BASEBOARD_DEDEDE_LAPTOP select DRIVERS_GENERIC_MAX98357A + select VARIANT_HAS_CAMERA_ACPI
config BOARD_GOOGLE_DRAWCIA_LEGACY bool "Drawcia (Legacy)" @@ -27,6 +28,7 @@ select BASEBOARD_DEDEDE_LAPTOP select BOARD_ROMSIZE_KB_32768 select DRIVERS_GENERIC_MAX98357A + select VARIANT_HAS_CAMERA_ACPI
config BOARD_GOOGLE_MADOO bool "-> Madoo" diff --git a/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/cam1.asl b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/cam1.asl new file mode 100644 index 0000000..1e9218e --- /dev/null +++ b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/cam1.asl @@ -0,0 +1,322 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (_SB.PCI0.I2C3) +{ + Name (STA, Zero) + + /* Method to turn off Power Rails */ + Method (POFF, 0) + { + /* Disable PP1200 lane */ + CTXS(GPP_D14) + /* Disable PP2800 lane */ + CTXS(GPP_D13) + } + + Method (PON, 0) + { + /* Enable PP2800 lane */ + STXS(GPP_D13) + /* Enable PP1200 lane */ + STXS(GPP_D14) + } + + PowerResource (RCPR, 0x00, 0x0000) + { + Method (_ON, 0, Serialized) /* _ON_: Power On */ + { + If ((STA == Zero)) + { + MCON(1, 1) /* Clock 1, 19.2MHz */ + /* Assert Reset */ + PON() + CTXS(GPP_D12) + Sleep(5) /* 5 us */ + /* DeAssert Reset */ + STXS(GPP_D12) + Sleep(5) /* 5 us */ + STA = 1 + } + } + + Method (_OFF, 0, Serialized) /* _OFF_: Power Off */ + { + If ((STA == One)) + { + MCOF(1) /* Clock 1 */ + /* Assert Reset */ + CTXS(GPP_D12) + POFF() + STA = 0 + } + } + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (STA) + } + } + + Device(CAM1) + { + Name (_HID, "OVTI8856") /* _HID: Hardware ID */ + + Name (_UID, Zero) /* _UID: Unique ID */ + + Name (_DDN, "Ov 8856 Camera") /* _DDN: DOS Device Name */ + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () /* _CRS: Current Resource Settings */ + { + I2cSerialBus (0x0010, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , + ) + }) + + Name (_PR0, Package (0x01) /* _PR0: Power Resources for D0 */ + { + RCPR + }) + + Name (_PR3, Package (0x01) /* _PR3: Power Resources for D3hot */ + { + RCPR + }) + + Name (_DSD, Package (0x04) /* _DSD: Device-Specific Data */ + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "port0", + "PRT0" + } + }, + + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x02) + { + Package (0x02) + { + "clock-frequency", + 0x0124F800 + }, + + Package (0x02) + { + "lens-focus", + Package (0x01) + { + VCM0 + } + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (EP00, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x05) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04, + } + }, + + Package (0x02) + { + "link-frequencies", + Package (0x02) + { + 0x15752A00, + 0xABA9500 + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + IPU0, + One, + Zero + } + } + } + }) + } + + Device(VCM0) + { + Name (_HID, "PRP0001") /* _HID: Hardware ID */ + + Name (_UID, 0x00) /* _UID: Unique ID */ + + Name (_DDN, "DW9714 VCM") /* _DDN: DOS Device Name */ + + Method (_STA, 0, NotSerialized) /* _STA: Status */ + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () /* _CRS: Current Resource Settings */ + { + I2cSerialBusV2 (0x000C, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + + Name (_DEP, Package (0x01) /* _DEP: Dependencies */ + { + CAM1 + }) + + Name (_PR0, Package (0x01) /* _PR0: Power Resources for D0 */ + { + RCPR + }) + + Name (_PR3, Package (0x01) /* _PR3: Power Resources for D3hot */ + { + RCPR + }) + + Name (_DSD, Package (0x02) /* _DSD: Device-Specific Data */ + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), /* Device Properties for _DSD */ + Package (0x01) + { + Package (0x02) + { + "compatible", + "dongwoon,dw9714" + } + } + }) + } + + Device (NVM0) + { + Name (_HID, "PRP0001") /* _HID: Hardware ID */ + + Name (_UID, 0x01) /* _UID: Unique ID */ + + Name (_DDN, "AT24 EEPROM") /* _DDN: DOS Device Name */ + + Method (_STA, 0, NotSerialized) /* _STA: Status*/ + { + Return (0x0F) + } + + Name (_CRS, ResourceTemplate () /* _CRS: Current Resource Settings */ + { + I2cSerialBusV2 (0x0050, ControllerInitiated, 0x00061A80, + AddressingMode7Bit, "\_SB.PCI0.I2C3", + 0x00, ResourceConsumer, , Exclusive, + ) + }) + + Name (_DEP, Package (0x01) /* _DEP: Dependencies */ + { + CAM1 + }) + + Name (_PR0, Package (0x01) /* _PR0: Power Resources for D0 */ + { + RCPR + }) + + Name (_PR3, Package (0x01) /* _PR3: Power Resources for D3hot */ + { + RCPR + }) + + Name (_DSD, Package (0x02) /* _DSD: Device-Specific Data */ + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), /* Device Properties for _DSD */ + Package (0x05) + { + Package (0x02) + { + "size", + 0x0400 + }, + + Package (0x02) + { + "pagesize", + One + }, + + Package (0x02) + { + "read-only", + One + }, + + Package (0x02) + { + "address-width", + 0x08 + }, + + Package (0x02) + { + "compatible", + "atmel,24c08" + } + } + }) + } +} diff --git a/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/camera.asl b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/camera.asl new file mode 100644 index 0000000..48650c9 --- /dev/null +++ b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/camera.asl @@ -0,0 +1,5 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "ipu_mainboard.asl" +#include "ipu_endpoints.asl" +#include "cam1.asl" diff --git a/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_endpoints.asl b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_endpoints.asl new file mode 100644 index 0000000..7b38702 --- /dev/null +++ b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_endpoints.asl @@ -0,0 +1,46 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (_SB.PCI0.IPU0) +{ + Name (EP10, Package (0x02) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x04) + { + Package (0x02) + { + "endpoint", + Zero + }, + + Package (0x02) + { + "clock-lanes", + Zero + }, + + Package (0x02) + { + "data-lanes", + Package (0x04) + { + One, + 0x02, + 0x03, + 0x04, + } + }, + + Package (0x02) + { + "remote-endpoint", + Package (0x03) + { + ^I2C3.CAM1, + Zero, + Zero + } + } + } + }) +} diff --git a/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_mainboard.asl b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_mainboard.asl new file mode 100644 index 0000000..34c3d4b --- /dev/null +++ b/src/mainboard/google/dedede/variants/drawcia/include/variant/acpi/ipu_mainboard.asl @@ -0,0 +1,79 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +Scope (_SB.PCI0) +{ + Device (IPU0) + { + Name (_ADR, 0x00050000) /* _ADR: Address */ + + Name (_DDN, "Camera and Imaging Subsystem") /* _DDN: DOS Device Name */ + } +} + +Scope (_SB.PCI0.IPU0) +{ + Name (_DSD, Package (0x02) /* _DSD: Device-Specific Data */ + { + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x02) + { + Package (0x02) + { + "port0", + "PRT0" + }, + + Package (0x02) + { + "port1", + "PRT1" + } + } + }) + + Name (PRT0, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + Zero + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP00" + } + } + }) + + Name (PRT1, Package (0x04) + { + ToUUID ("daffd814-6eba-4d8c-8a91-bc9bbf4aa301"), + Package (0x01) + { + Package (0x02) + { + "port", + 2 + } + }, + + ToUUID ("dbb8e3e6-5886-4ba6-8795-1319f52a966b"), + Package (0x01) + { + Package (0x02) + { + "endpoint0", + "EP10" + } + } + }) +} diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index ee95332..809ce6c 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -47,6 +47,7 @@ register "tcc_offset" = "20" # TCC of 85C
device domain 0 on + device pci 05.0 on end # IPU - MIPI Camera device pci 04.0 on chip drivers/intel/dptf
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 1:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/1//COMMIT_MSG@12 PS1, Line 12: There has been some effort to move away from the static ACPI tables. Please refer to CB:44397 regarding the run-time generation of ACPI tables for camera.
Sugnan Prabhu, Can you please confirm that is the right approach?
Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 1:
@Chen,@Shawn,
Can you have take the following as reference and move this ti SSDT?
CB:41758 CB:44397 CB:42205
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 1:
Patch Set 1:
@Chen,@Shawn,
Can you have take the following as reference and move this ti SSDT?
CB:41758 CB:44397 CB:42205
Reply on behave of Intel Shawn. Some of the CLs are not merged yet. Suggest to adopt SSDT to Drawcia camera config after the the new CB arch is reviewed/merged. If Quanta is urgent, suggest they can cherrypick this DSDT CL for factory build and verification.
Evan Green has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 1: Code-Review+1
This looks ok to me, but I will admit to possibly missing the finer details. Unless anyone spots any glaring problems should we just put it in? I don't have +2 rights, but here's a +1 from me.
Evan Green has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 1: -Code-Review
Oh wait, I missed Karthik's comment. Looks like there's a different approach that should be taken.
Hello Tian Shu Qiu, build bot (Jenkins), Henry Sun, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#2).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable IPU 2. enable VARIANT_HAS_CAMERA_ACPI 3. add VCM/NVM asl code
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 4 files changed, 97 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/2
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Patrick Rudolph, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#3).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable IPU 2. enable VARIANT_HAS_CAMERA_ACPI 3. add VCM/NVM asl code
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 4 files changed, 97 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/3
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Patrick Rudolph, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#4).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable IPU 2. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 3. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 4 files changed, 97 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/4
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Patrick Rudolph, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#5).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/mipi_camera/chip.h M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 4 files changed, 97 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/5
Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/5/src/drivers/intel/mipi_came... File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/44939/5/src/drivers/intel/mipi_came... PS5, Line 479: acpi_dp_add_string(dsd, "compatible", config->nvm_compat) @Chen, can you please push changes in camera.c and chip.h as a separate patch? Let's limit the current patch only with the changes related to Drawcia.
Chen Wisley has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 6:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/5/src/drivers/intel/mipi_came... File src/drivers/intel/mipi_camera/camera.c:
https://review.coreboot.org/c/coreboot/+/44939/5/src/drivers/intel/mipi_came... PS5, Line 479: acpi_dp_add_string(dsd, "compatible", config->nvm_compat)
@Chen, can you please push changes in camera.c and chip.h as a separate patch? […]
Done
Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 6: Code-Review+1
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Patrick Rudolph, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#7).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 92 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/7
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 7: Code-Review+1
LGTM
Matt Delco has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 7:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/7/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/7/src/mainboard/google/dedede... PS7, Line 272: register "nvm_compat" = ""atmel,24c08"" This nvm_compat seems to be redundant to the prior 4 lines that specify the NVM characteristics. If this line and the acpi_hid=ACPI_DT_NAMESPACE_HID line (line 260) was removed then I'd expect everything else to still work (since the device would end up with a _HID of INT3499, which will load the same driver and use nvm_size/nvm_pagesize/nvm_readonly/nvm_width properties).
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Andy Yeh, Evan Green, Sugnan Prabhu S, Justin TerAvest, Marco Chen, Andy Yeh, Patrick Rudolph, Karthik Ramasubramanian, ShawnX Tu,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#8).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 90 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/8
Chen Wisley has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/7/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/7/src/mainboard/google/dedede... PS7, Line 272: register "nvm_compat" = ""atmel,24c08""
This nvm_compat seems to be redundant to the prior 4 lines that specify the NVM characteristics. […]
after remove acpi_hid/nv_compat, I can see eeprom node under i2c-INT3499
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8: Code-Review+1
LGTM
Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8: Code-Review+1
Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8: Code-Review+1
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/1//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/1//COMMIT_MSG@12 PS1, Line 12:
There has been some effort to move away from the static ACPI tables. […]
Done
Matt Delco has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... PS8, Line 214: 0x0C I've seen other boards use 2 or 3 for dw9714, but I'm not sure which (if any) of the 3 values is correct. I mostly hope that the 0x0C isn't being confused with lines that could be added that indicate the I2C address of the VCM and NVM devices:
register "vcm_address" = "0x0C" register "rom_address" = "0x50"
The second line isn't so useful unless/until "ssdb.rom_type" is specified, but I'm even less sure about what value to use for the GT24C08 model of NVM.
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... PS8, Line 248: register "acpi_hid" = "ACPI_DT_NAMESPACE_HID" NIT: ACPI_DT_NAMESPACE_HID is already the default for INTEL_ACPI_CAMERA_VCM so this line isn't needed (but not harmful either).
Varshit B Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
How do you plan to differentiate these entries for different skus viz Drawlat, Drawcia, Drawman ?
Chen Wisley has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
Drawcia is convertible, drawman/drawlat is challshell and only drawcia support mipi camera. Maybe we can use tabletmode bit of fw_config to probe, addd probe TABLEMODE TABLEMODE_ENABLE on devicetree.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
(3 comments)
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG@10 PS8, Line 10: 2. add IPU/VCM/NVM/CAM1 in devicetree Can you please mention it is WFC. I interpret it so, but is not clear.
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG@13 PS8, Line 13: grap Nit: grap -> grab
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... PS8, Line 233: register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" : register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5) In the initial static ACPI ASL file, there is no delay between turning on Power Enable GPIOs. Do we still need the delay?
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 8:
Hi Wisley,
As talked to Google on the bug https://partnerissuetracker.corp.google.com/issues/167938257, So please help pull back / rebase this CL which is with the i2c address for the future unified one (0x36).
In parallel we can develop the id table loading mechanism with the modules with id table for IQ tuning separation.
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Andy Yeh, Evan Green, Sugnan Prabhu S, Marco Chen, Andy Yeh, Patrick Rudolph, ShawnX Tu, Varshit B Pandya, Justin TerAvest, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#9).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grap picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 90 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/9
Hello build bot (Jenkins), Tian Shu Qiu, Henry Sun, Andy Yeh, Evan Green, Sugnan Prabhu S, Marco Chen, Andy Yeh, Patrick Rudolph, ShawnX Tu, Varshit B Pandya, Justin TerAvest, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#10).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
To support mipi WFC. 1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=follow steps on issue tracker to grab picture manually.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 90 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/10
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 10: Code-Review+1
Hi Thomaz, Furquan,
Suggest to merge this CL to Drawcia hence new modules for DVT build will have unified i2c address as 0x36. LVI will change from 0x10 to 0x36. Thanks.
Tomasz Figa has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC"" This will likely cause issues with privacy LED blinking, because accessing the EEPROM will unnecessarily power up the full module. However, I'm fine with filing a bug to fix it and landing this as is for now to unblock dogfooding and other testing.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 10:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
This will likely cause issues with privacy LED blinking, because accessing the EEPROM will unnecessa […]
Can we access the EEPROM with a subset of power resources? Do you think even with the subset of power resources, privacy LED will blink?
Just wanted to ensure that we dont need a hardware fix for this scenario.
Hello build bot (Jenkins), Tian Shu Qiu, Furquan Shaikh, Henry Sun, Andy Yeh, Evan Green, Sugnan Prabhu S, Marco Chen, Andy Yeh, Patrick Rudolph, Tomasz Figa, ShawnX Tu, Varshit B Pandya, Justin TerAvest, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/44939
to look at the new patch set (#11).
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
To support mipi WFC. 1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 TEST=build and verified by camera app.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 91 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/11
ShawnX Tu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 11:
(1 comment)
Patch Set 10: Code-Review+1
Hi Thomaz, Furquan,
Suggest to merge this CL to Drawcia hence new modules for DVT build will have unified i2c address as 0x36. LVI will change from 0x10 to 0x36. Thanks.
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
Can we access the EEPROM with a subset of power resources? Do you think even with the subset of powe […]
Testing the CL patch#11 OK on CPFE #13544. I didn't see any blinking LED while boot up in drawcia EVT. Only turn on LED when launch the WFC.
Tomasz Figa has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 11:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
Testing the CL patch#11 OK on CPFE #13544. […]
Shawn, the fact that it doesn't happen right now doesn't mean that it wouldn't happen. Does the userspace even access the EEPROM currently?
Karthik, yes, usually the EEPROM only needs 1 voltage rail and I2C lines pull-ups.
Regardless of that, let's land this as is initially to unblock others and have this addressed as a follow up.
Andy Yeh has uploaded a new patch set (#12) to the change originally created by Chen Wisley. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
To support mipi WFC. 1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470 BUG=b:171258890 BUG=b:170936728 BUG=b:167938257 TEST=build and verified by camera app.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 91 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/12
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 12: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
Shawn, the fact that it doesn't happen right now doesn't mean that it wouldn't happen. […]
EEPROM access has been verified both by Quanta Wisley and Intel Shawn on Drawcia EVT.
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG@13 PS12, Line 13: BUG=b:163879470 : BUG=b:171258890 : BUG=b:170936728 : BUG=b:167938257 Put all the bugs in a single line i.e. BUG=b:163879470, b:171258890, b:170936728, b:167938257
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG@17 PS12, Line 17: build and verified by camera app. Nit: Build and boot to OS. Capture frames using camera app.
Andy Yeh has uploaded a new patch set (#13) to the change originally created by Chen Wisley. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
To support mipi WFC. 1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470, b:171258890, b:170936728, b:167938257 TEST=Build and boot to OS. Capture frames using camera app.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 91 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/44939/13
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(2 comments)
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG@13 PS12, Line 13: BUG=b:163879470 : BUG=b:171258890 : BUG=b:170936728 : BUG=b:167938257
Put all the bugs in a single line i.e. […]
Done
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG@17 PS12, Line 17: build and verified by camera app.
Nit: Build and boot to OS. Capture frames using camera app.
Done
Karthik Ramasubramanian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13: Code-Review+2
Tomasz Figa has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
EEPROM access has been verified both by Quanta Wisley and Intel Shawn on Drawcia EVT.
Okay, then it sounds like at least the userspace now does the right thing and doesn't attempt to use the EEPROM when the system is booting, but only when the camera is being opened.
Still, that doesn't waive the requirement of the EEPROM device being accessible to the system without powering up the other components of the module, so please fix it - a follow up CL after we land this one is okay.
Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13: Code-Review+1
" All-Comments-Resolved " votes is still missing which blocks the merge,
Hi Wisley/Andy,
Will you please help check is there still un-resolved comments in this CLs? Thanks!
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(2 comments)
Resolved comments.
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/12//COMMIT_MSG@13 PS12, Line 13: BUG=b:163879470 : BUG=b:171258890 : BUG=b:170936728 : BUG=b:167938257
Done
done
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
Okay, then it sounds like at least the userspace now does the right thing and doesn't attempt to use […]
resolved
Sugnan Prabhu S has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(1 comment)
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/10/src/mainboard/google/deded... PS10, Line 277: register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC""
Okay, then it sounds like at least the userspace now does the right thing and doesn't attempt to use […]
@Karthik/@Tomasz,
As per my understand, you would want to have a different or subset of power sequence for the EEPROM/NVM0, which is already possible if we set has_power_resource and define the power sequence just like the UFC,WFC and not define pr0
register "has_power_resource" = "1" #Controls register "clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_1 register "clk_panel.clks[0].freq" = "1" #19.2 Mhz register "gpio_panel.gpio[0].gpio_num" = "GPP_D13" #power_enable_2p8 register "gpio_panel.gpio[1].gpio_num" = "GPP_D14" #power_enable_1p2 #_ON register "on_seq.ops_cnt" = "5" register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)"
Chen Wisley has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(2 comments)
Patch Set 1:
Patch Set 1:
@Chen,@Shawn,
Can you have take the following as reference and move this ti SSDT?
CB:41758 CB:44397 CB:42205
Reply on behave of Intel Shawn. Some of the CLs are not merged yet. Suggest to adopt SSDT to Drawcia camera config after the the new CB arch is reviewed/merged. If Quanta is urgent, suggest they can cherrypick this DSDT CL for factory build and verification.
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG@10 PS8, Line 10: 2. add IPU/VCM/NVM/CAM1 in devicetree
Can you please mention it is WFC. I interpret it so, but is not clear.
Done
https://review.coreboot.org/c/coreboot/+/44939/8//COMMIT_MSG@13 PS8, Line 13: grap
Nit: grap -> grab
Done
Andy Yeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
(1 comment)
Patch Set 10: Code-Review+1
Hi Thomaz, Furquan,
Suggest to merge this CL to Drawcia hence new modules for DVT build will have unified i2c address as 0x36. LVI will change from 0x10 to 0x36. Thanks.
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... File src/mainboard/google/dedede/variants/drawcia/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/44939/8/src/mainboard/google/dedede... PS8, Line 233: register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" : register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)
In the initial static ACPI ASL file, there is no delay between turning on Power Enable GPIOs. […]
current delay is complied with the sensor spec (could be infinite) so it won't affect stability and functions. We will optimize the sequence on DVT stage.
Henry Sun has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
Patch Set 13:
coreboot owners, We've got all necessary vote on this CL, please help to pick and merge to google source. or please let us know anything is still missing.
Thanks!
Karthik Ramasubramanian has submitted this change. ( https://review.coreboot.org/c/coreboot/+/44939 )
Change subject: mb/google/dedede/var/drawcia: Add MIPI camera support ......................................................................
mb/google/dedede/var/drawcia: Add MIPI camera support
To support mipi WFC. 1. enable DRIVERS_INTEL_MIPI_CAMERA/SOC_INTEL_COMMON_BLOCK_IPU 2. add IPU/VCM/NVM/CAM1 in devicetree
BUG=b:163879470, b:171258890, b:170936728, b:167938257 TEST=Build and boot to OS. Capture frames using camera app.
Change-Id: I96f2ef682dff851d7788c2b612765a92228ddf75 Signed-off-by: Wisley Chen wisley.chen@quantatw.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/44939 Reviewed-by: Karthik Ramasubramanian kramasub@google.com Reviewed-by: Henry Sun henrysun@google.com Reviewed-by: Andy Yeh andy.yeh@intel.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/mainboard/google/dedede/Kconfig.name M src/mainboard/google/dedede/variants/drawcia/overridetree.cb 2 files changed, 91 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Andy Yeh: Looks good to me, but someone else must approve Karthik Ramasubramanian: Looks good to me, approved Henry Sun: Looks good to me, but someone else must approve
diff --git a/src/mainboard/google/dedede/Kconfig.name b/src/mainboard/google/dedede/Kconfig.name index 689df68..31495a1 100644 --- a/src/mainboard/google/dedede/Kconfig.name +++ b/src/mainboard/google/dedede/Kconfig.name @@ -21,6 +21,8 @@ select BASEBOARD_DEDEDE_LAPTOP select DRIVERS_GENERIC_MAX98357A select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR + select DRIVERS_INTEL_MIPI_CAMERA + select SOC_INTEL_COMMON_BLOCK_IPU
config BOARD_GOOGLE_DRAWCIA_LEGACY bool "Drawcia (Legacy)" @@ -28,6 +30,8 @@ select BASEBOARD_DEDEDE_LAPTOP select BOARD_ROMSIZE_KB_32768 select DRIVERS_GENERIC_MAX98357A + select DRIVERS_INTEL_MIPI_CAMERA + select SOC_INTEL_COMMON_BLOCK_IPU
config BOARD_GOOGLE_MADOO bool "-> Madoo" diff --git a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb index ac7a97e..5942121 100644 --- a/src/mainboard/google/dedede/variants/drawcia/overridetree.cb +++ b/src/mainboard/google/dedede/variants/drawcia/overridetree.cb @@ -65,6 +65,21 @@ register "tcc_offset" = "20" # TCC of 85C
device domain 0 on + device pci 05.0 on # IPU - MIPI Camera + chip drivers/intel/mipi_camera + register "acpi_uid" = "0x50000" + register "acpi_name" = ""IPU0"" + register "device_type" = "INTEL_ACPI_CAMERA_CIO2" + + register "cio2_num_ports" = "2" + register "cio2_lanes_used" = "{1,4}" + register "cio2_lane_endpoint[1]" = ""^I2C3.CAM1"" + register "cio2_prt[0]" = "0" + register "cio2_prt[1]" = "2" + device generic 0 on end + end + end + device pci 04.0 on chip drivers/intel/dptf # Default DPTF Policy for all drawcia boards if not overridden @@ -198,6 +213,78 @@ device i2c 15 on end end end # I2C 2 + device pci 15.3 on + chip drivers/intel/mipi_camera + register "acpi_hid" = ""OVTI8856"" + register "acpi_uid" = "0" + register "acpi_name" = ""CAM1"" + register "chip_name" = ""Ov 8856 Camera"" + register "device_type" = "INTEL_ACPI_CAMERA_SENSOR" + + register "ssdb.lanes_used" = "4" + register "ssdb.link_used" = "1" + register "ssdb.vcm_type" = "0x0C" + register "vcm_name" = ""VCM0"" + register "num_freq_entries" = "2" + register "link_freq[0]" = "360000000" + register "link_freq[1]" = "180000000" + register "remote_name" = ""IPU0"" + + register "has_power_resource" = "1" + #Controls + register "clk_panel.clks[0].clknum" = "1" #IMGCLKOUT_1 + register "clk_panel.clks[0].freq" = "1" #19.2 Mhz + + register "gpio_panel.gpio[0].gpio_num" = "GPP_D13" #power_enable_2p8 + register "gpio_panel.gpio[1].gpio_num" = "GPP_D14" #power_enable_1p2 + register "gpio_panel.gpio[2].gpio_num" = "GPP_D12" #reset + + #_ON + register "on_seq.ops_cnt" = "5" + register "on_seq.ops[0]" = "SEQ_OPS_CLK_ENABLE(0, 0)" + register "on_seq.ops[1]" = "SEQ_OPS_GPIO_ENABLE(0, 5)" + register "on_seq.ops[2]" = "SEQ_OPS_GPIO_ENABLE(1, 5)" + register "on_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(2, 5)" + register "on_seq.ops[4]" = "SEQ_OPS_GPIO_ENABLE(2, 5)" + + #_OFF + register "off_seq.ops_cnt" = "4" + register "off_seq.ops[0]" = "SEQ_OPS_CLK_DISABLE(0, 0)" + register "off_seq.ops[1]" = "SEQ_OPS_GPIO_DISABLE(2, 0)" + register "off_seq.ops[2]" = "SEQ_OPS_GPIO_DISABLE(1, 0)" + register "off_seq.ops[3]" = "SEQ_OPS_GPIO_DISABLE(0, 0)" + + device i2c 36 on end + end + chip drivers/intel/mipi_camera + register "acpi_hid" = "ACPI_DT_NAMESPACE_HID" + register "acpi_uid" = "3" + register "acpi_name" = ""VCM0"" + register "chip_name" = ""DW AF DAC"" + register "device_type" = "INTEL_ACPI_CAMERA_VCM" + + register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC"" + register "vcm_compat" = ""dongwoon,dw9714"" + + device i2c 0C on end + end + chip drivers/intel/mipi_camera + register "acpi_uid" = "1" + register "acpi_name" = ""NVM0"" + register "chip_name" = ""GT24C08"" + register "device_type" = "INTEL_ACPI_CAMERA_NVM" + + register "pr0" = ""\_SB.PCI0.I2C3.CAM1.PRIC"" + + register "nvm_size" = "0x0400" + register "nvm_pagesize" = "1" + register "nvm_readonly" = "1" + register "nvm_width" = "0x08" + register "nvm_compat" = ""atmel,24c08"" + + device i2c 50 on end + end + end # I2C 3 device pci 19.0 on chip drivers/i2c/generic register "hid" = ""10EC5682""
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