Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing cbmem_top via calling arguments is not an option. To work around this populate _cbmem_top_ptr with cbmem_top_chipset which is also used in romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/arm64/Kconfig M src/soc/nvidia/tegra210/ramstage.c 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/36557/1
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 0438ded..c7eafe6 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -17,7 +17,7 @@ config ARCH_RAMSTAGE_ARM64 bool select ARCH_ARM64 - select RAMSTAGE_CBMEM_TOP_ARG if !SOC_NVIDIA_TEGRA210 + select RAMSTAGE_CBMEM_TOP_ARG
source src/arch/arm64/armv8/Kconfig
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 13fa1c6..6d91052 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -15,6 +15,7 @@
#include <arch/lib_helpers.h> #include <arch/stages.h> +#include <cbmem.h> #include <console/console.h> #include <device/mmio.h> #include <gic.h> @@ -72,6 +73,11 @@ if (tegra210_run_mtc() != 0) printk(BIOS_ERR, "MTC: No training data.\n");
+ /* Ramstage is run on a different core, so passing cbmem_top + via calling arguments is not an option, but it is not a problem + to call cbmem_top_chipset() again here to populate _cbmem_top_ptr. */ + _cbmem_top_ptr = cbmem_top_chipset(); + /* Jump to boot state machine in common code. */ main(); }
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 1: Code-Review+2
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36557
to look at the new patch set (#2).
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing cbmem_top via calling arguments is not an option. To work around this populate _cbmem_top_ptr with cbmem_top_chipset which is also used in romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/arm64/Kconfig M src/soc/nvidia/tegra210/ramstage.c 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/36557/2
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 2: Code-Review+2
Hello Julius Werner, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/36557
to look at the new patch set (#3).
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing cbmem_top via calling arguments is not an option. To work around this populate _cbmem_top_ptr with cbmem_top_chipset which is also used in romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/arm64/Kconfig M src/soc/nvidia/tegra210/ramstage.c 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/36557/3
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36557/2/src/soc/nvidia/tegra210/ram... File src/soc/nvidia/tegra210/ramstage.c:
https://review.coreboot.org/c/coreboot/+/36557/2/src/soc/nvidia/tegra210/ram... PS2, Line 79: (void *) It's getting late...
Anyway see CB:36559
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 4:
(1 comment)
Care to reinstate +2?
https://review.coreboot.org/c/coreboot/+/36557/2/src/soc/nvidia/tegra210/ram... File src/soc/nvidia/tegra210/ramstage.c:
https://review.coreboot.org/c/coreboot/+/36557/2/src/soc/nvidia/tegra210/ram... PS2, Line 79: (void *)
It's getting late... […]
Done
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 4: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing cbmem_top via calling arguments is not an option. To work around this populate _cbmem_top_ptr with cbmem_top_chipset which is also used in romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b Signed-off-by: Arthur Heymans arthur@aheymans.xyz Reviewed-on: https://review.coreboot.org/c/coreboot/+/36557 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/arch/arm64/Kconfig M src/soc/nvidia/tegra210/ramstage.c 2 files changed, 7 insertions(+), 1 deletion(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 0438ded..c7eafe6 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -17,7 +17,7 @@ config ARCH_RAMSTAGE_ARM64 bool select ARCH_ARM64 - select RAMSTAGE_CBMEM_TOP_ARG if !SOC_NVIDIA_TEGRA210 + select RAMSTAGE_CBMEM_TOP_ARG
source src/arch/arm64/armv8/Kconfig
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 13fa1c6..2e01523 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -15,6 +15,7 @@
#include <arch/lib_helpers.h> #include <arch/stages.h> +#include <cbmem.h> #include <console/console.h> #include <device/mmio.h> #include <gic.h> @@ -72,6 +73,11 @@ if (tegra210_run_mtc() != 0) printk(BIOS_ERR, "MTC: No training data.\n");
+ /* Ramstage is run on a different core, so passing cbmem_top + via calling arguments is not an option, but it is not a problem + to call cbmem_top_chipset() again here to populate _cbmem_top_ptr. */ + _cbmem_top_ptr = (uintptr_t)cbmem_top_chipset(); + /* Jump to boot state machine in common code. */ main(); }
Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/36557/4/src/soc/nvidia/tegra210/ram... File src/soc/nvidia/tegra210/ramstage.c:
https://review.coreboot.org/c/coreboot/+/36557/4/src/soc/nvidia/tegra210/ram... PS4, Line 79: _cbmem_top_ptr = (uintptr_t)cbmem_top_chipset(); Why is this not done earlier? isn't the printk() above, for instance, potentially trying to use CBMEM?
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Arthur Heymans (Code Review) -
Julius Werner (Code Review)
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Nico Huber (Code Review)
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Patrick Georgi (Code Review)