Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36557 )
Change subject: soc/nvidia/tegra210: Populate _cbmem_top_ptr ......................................................................
soc/nvidia/tegra210: Populate _cbmem_top_ptr
On this platform the ramstage is run on a different core so passing cbmem_top via calling arguments is not an option. To work around this populate _cbmem_top_ptr with cbmem_top_chipset which is also used in romstage.
Change-Id: I8799c12705e944162c05fb7225ae21d32a2a882b Signed-off-by: Arthur Heymans arthur@aheymans.xyz --- M src/arch/arm64/Kconfig M src/soc/nvidia/tegra210/ramstage.c 2 files changed, 7 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/36557/1
diff --git a/src/arch/arm64/Kconfig b/src/arch/arm64/Kconfig index 0438ded..c7eafe6 100644 --- a/src/arch/arm64/Kconfig +++ b/src/arch/arm64/Kconfig @@ -17,7 +17,7 @@ config ARCH_RAMSTAGE_ARM64 bool select ARCH_ARM64 - select RAMSTAGE_CBMEM_TOP_ARG if !SOC_NVIDIA_TEGRA210 + select RAMSTAGE_CBMEM_TOP_ARG
source src/arch/arm64/armv8/Kconfig
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c index 13fa1c6..6d91052 100644 --- a/src/soc/nvidia/tegra210/ramstage.c +++ b/src/soc/nvidia/tegra210/ramstage.c @@ -15,6 +15,7 @@
#include <arch/lib_helpers.h> #include <arch/stages.h> +#include <cbmem.h> #include <console/console.h> #include <device/mmio.h> #include <gic.h> @@ -72,6 +73,11 @@ if (tegra210_run_mtc() != 0) printk(BIOS_ERR, "MTC: No training data.\n");
+ /* Ramstage is run on a different core, so passing cbmem_top + via calling arguments is not an option, but it is not a problem + to call cbmem_top_chipset() again here to populate _cbmem_top_ptr. */ + _cbmem_top_ptr = cbmem_top_chipset(); + /* Jump to boot state machine in common code. */ main(); }