Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/45308 )
Change subject: soc/amd/picasso/aoac: make AOAC device number unsigned ......................................................................
soc/amd/picasso/aoac: make AOAC device number unsigned
The AOAC device number is never negative, so make it unsigned.
BRANCH=zork
Change-Id: I3e0d15a646f02da5767504471961d5d9f8f28bea Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/aoac.c M src/soc/amd/picasso/include/soc/southbridge.h 2 files changed, 8 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/45308/1
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c index f31afbf..f7996e6 100644 --- a/src/soc/amd/picasso/aoac.c +++ b/src/soc/amd/picasso/aoac.c @@ -29,7 +29,7 @@ FCH_AOAC_DEV_ESPI, };
-void power_on_aoac_device(int dev) +void power_on_aoac_device(unsigned int dev) { uint8_t byte;
@@ -41,7 +41,7 @@ aoac_write8(AOAC_DEV_D3_CTL(dev), byte); }
-void power_off_aoac_device(int dev) +void power_off_aoac_device(unsigned int dev) { uint8_t byte;
@@ -51,7 +51,7 @@ aoac_write8(AOAC_DEV_D3_CTL(dev), byte); }
-bool is_aoac_device_enabled(int dev) +bool is_aoac_device_enabled(unsigned int dev) { uint8_t byte;
@@ -63,7 +63,7 @@ return false; }
-void wait_for_aoac_enabled(int dev) +void wait_for_aoac_enabled(unsigned int dev) { while (!is_aoac_device_enabled(dev)) udelay(100); diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index 168b2b2..547f602 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -269,10 +269,10 @@ } __packed aoac_devs_t;
void enable_aoac_devices(void); -bool is_aoac_device_enabled(int dev); -void power_on_aoac_device(int dev); -void power_off_aoac_device(int dev); -void wait_for_aoac_enabled(int dev); +bool is_aoac_device_enabled(unsigned int dev); +void power_on_aoac_device(unsigned int dev); +void power_off_aoac_device(unsigned int dev); +void wait_for_aoac_enabled(unsigned int dev); void sb_clk_output_48Mhz(void); void sb_enable(struct device *dev); void southbridge_final(void *chip_info);
Felix Held has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/45308 )
Change subject: soc/amd/picasso/aoac: make AOAC device number unsigned ......................................................................
soc/amd/picasso/aoac: make AOAC device number unsigned
The AOAC device number is never negative, so make it unsigned.
BRANCH=zork
Change-Id: I3e0d15a646f02da5767504471961d5d9f8f28bea Signed-off-by: Felix Held felix-coreboot@felixheld.de --- M src/soc/amd/picasso/aoac.c M src/soc/amd/picasso/include/soc/southbridge.h 2 files changed, 9 insertions(+), 9 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/45308/2
Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/45308 )
Change subject: soc/amd/picasso/aoac: make AOAC device number unsigned ......................................................................
Patch Set 2: Code-Review+2
Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/45308 )
Change subject: soc/amd/picasso/aoac: make AOAC device number unsigned ......................................................................
soc/amd/picasso/aoac: make AOAC device number unsigned
The AOAC device number is never negative, so make it unsigned.
BRANCH=zork
Change-Id: I3e0d15a646f02da5767504471961d5d9f8f28bea Signed-off-by: Felix Held felix-coreboot@felixheld.de Reviewed-on: https://review.coreboot.org/c/coreboot/+/45308 Reviewed-by: Furquan Shaikh furquan@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/soc/amd/picasso/aoac.c M src/soc/amd/picasso/include/soc/southbridge.h 2 files changed, 9 insertions(+), 9 deletions(-)
Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved
diff --git a/src/soc/amd/picasso/aoac.c b/src/soc/amd/picasso/aoac.c index f31afbf..1f7dcb0 100644 --- a/src/soc/amd/picasso/aoac.c +++ b/src/soc/amd/picasso/aoac.c @@ -29,7 +29,7 @@ FCH_AOAC_DEV_ESPI, };
-void power_on_aoac_device(int dev) +void power_on_aoac_device(unsigned int dev) { uint8_t byte;
@@ -41,7 +41,7 @@ aoac_write8(AOAC_DEV_D3_CTL(dev), byte); }
-void power_off_aoac_device(int dev) +void power_off_aoac_device(unsigned int dev) { uint8_t byte;
@@ -51,7 +51,7 @@ aoac_write8(AOAC_DEV_D3_CTL(dev), byte); }
-bool is_aoac_device_enabled(int dev) +bool is_aoac_device_enabled(unsigned int dev) { uint8_t byte;
@@ -63,7 +63,7 @@ return false; }
-void wait_for_aoac_enabled(int dev) +void wait_for_aoac_enabled(unsigned int dev) { while (!is_aoac_device_enabled(dev)) udelay(100); @@ -71,7 +71,7 @@
void enable_aoac_devices(void) { - int i; + unsigned int i;
for (i = 0; i < ARRAY_SIZE(aoac_devs); i++) power_on_aoac_device(aoac_devs[i]); diff --git a/src/soc/amd/picasso/include/soc/southbridge.h b/src/soc/amd/picasso/include/soc/southbridge.h index 168b2b2..547f602 100644 --- a/src/soc/amd/picasso/include/soc/southbridge.h +++ b/src/soc/amd/picasso/include/soc/southbridge.h @@ -269,10 +269,10 @@ } __packed aoac_devs_t;
void enable_aoac_devices(void); -bool is_aoac_device_enabled(int dev); -void power_on_aoac_device(int dev); -void power_off_aoac_device(int dev); -void wait_for_aoac_enabled(int dev); +bool is_aoac_device_enabled(unsigned int dev); +void power_on_aoac_device(unsigned int dev); +void power_off_aoac_device(unsigned int dev); +void wait_for_aoac_enabled(unsigned int dev); void sb_clk_output_48Mhz(void); void sb_enable(struct device *dev); void southbridge_final(void *chip_info);