[M] Change in coreboot[master]: soc/intel/xeon_sp/acpi: Fix _OSC method

[Patrick Rudolph (Code Review)]

Attention is currently required from: Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Tim Chu.

Hello Jonathan Zhang, Johnny Lin, Christian Walter, Arthur Heymans, Tim Chu,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/74231

to look at the new patch set (#2).

Change subject: soc/intel/xeon_sp/acpi: Fix _OSC method
......................................................................

soc/intel/xeon_sp/acpi: Fix _OSC method

Fix a couple of bugs in the _OSC method for handling
"PCI Host Bridge Device" on Xeon-SP.

- Drop the Sleep. The code doesn't write to hardware at all, so
  there's no need to sleep here.
- Make sure that the number of DWORD passed in Arg2 is at least 3.
  The existing check was useless as it would not create the
  DWordField, but then use it anyways.
- Add check for CXL 2 device method calls which provide a 5 DWORD
  long buffer to prevent buffer overflows when invoking the
  "PCI Host Bridge Device" method.

Test:
Boot on Archer City and confirm that no ACPI errors are reported
for _OSC.

Change-Id: Ide598e386c30ced24e4f96c37f2b4a609ac33441
Signed-off-by: Patrick Rudolph 
---
M src/soc/intel/xeon_sp/acpi/iiostack.asl
M src/soc/intel/xeon_sp/spr/acpi/cxl_resource.asl
M src/soc/intel/xeon_sp/spr/acpi/pci_resource.asl
3 files changed, 54 insertions(+), 17 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/74231/2