Attention is currently required from: Andrey Petrov, Patrick Rudolph. Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52867 )
Change subject: drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPS ......................................................................
drivers/intel/fsp2_0: Add timestamps for loading FSPM & FSPS
The loads of the FSPM and FSPS binaries are not insignificant amounts of time, and without these timestamps, it's not clear what's going on in those time blocks. For FSPM, the timestamps can run together to make it look like that time is still part of the romstage init time.
BUG=None TEST=Build & Boot guybrush, look at timestamps.
Signed-off-by: Martin Roth martinroth@chromium.org Change-Id: I5796d4cdd512799c2eafee45a8ef561de5258b91 --- M src/commonlib/include/commonlib/timestamp_serialized.h M src/drivers/intel/fsp2_0/memory_init.c M src/drivers/intel/fsp2_0/silicon_init.c 3 files changed, 8 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/52867/1
diff --git a/src/commonlib/include/commonlib/timestamp_serialized.h b/src/commonlib/include/commonlib/timestamp_serialized.h index a572150..f202fbb 100644 --- a/src/commonlib/include/commonlib/timestamp_serialized.h +++ b/src/commonlib/include/commonlib/timestamp_serialized.h @@ -119,6 +119,8 @@ TS_FSP_AFTER_END_OF_FIRMWARE = 961, TS_FSP_MULTI_PHASE_SI_INIT_START = 962, TS_FSP_MULTI_PHASE_SI_INIT_END = 963, + TS_FSP_INITRAM_LOAD = 970, + TS_FSP_SILICON_INIT_LOAD = 971,
/* 1000+ reserved for payloads (1000-1200: ChromeOS depthcharge) */
@@ -261,6 +263,10 @@ { TS_FSP_BEFORE_END_OF_FIRMWARE, "calling FspNotify(EndOfFirmware)" }, { TS_FSP_AFTER_END_OF_FIRMWARE, "returning from FspNotify(EndOfFirmware)" }, + + { TS_FSP_INITRAM_LOAD, "Loading FSP-M" }, + { TS_FSP_SILICON_INIT_LOAD, "Loading FSP-S" }, + { TS_START_POSTCAR, "start of postcar" }, { TS_END_POSTCAR, "end of postcar" }, }; diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c index c5d560a..1d48973 100644 --- a/src/drivers/intel/fsp2_0/memory_init.c +++ b/src/drivers/intel/fsp2_0/memory_init.c @@ -387,6 +387,7 @@ _car_unallocated_start - _car_region_start, 0); memranges_insert(memmap, (uintptr_t)_program, REGION_SIZE(program), 0);
+ timestamp_add_now(TS_FSP_INITRAM_LOAD); if (fsp_load_component(&fspld, hdr) != CB_SUCCESS) die("FSPM not available or failed to load!\n");
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 707a380..625451b 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -228,6 +228,7 @@
void fsp_silicon_init(void) { + timestamp_add_now(TS_FSP_SILICON_INIT_LOAD); fsps_load();
mb_pre_fsps_init();