Marc Jones has uploaded this change for review. ( https://review.coreboot.org/23817
Change subject: soc/amd/stoneyridge: Add UMA save function ......................................................................
soc/amd/stoneyridge: Add UMA save function
Save the UMA values from AGESA to use in resource allocation in ramstage.
Change-Id: I2a218160649d934f615b2637ff122c36b4ba617e Signed-off-by: Marc Jones marcj303@gmail.com --- M src/soc/amd/stoneyridge/include/soc/iomap.h M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/amd/stoneyridge/sb_util.c 3 files changed, 58 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/23817/1
diff --git a/src/soc/amd/stoneyridge/include/soc/iomap.h b/src/soc/amd/stoneyridge/include/soc/iomap.h index 2319b88..354a2db 100644 --- a/src/soc/amd/stoneyridge/include/soc/iomap.h +++ b/src/soc/amd/stoneyridge/include/soc/iomap.h @@ -68,5 +68,7 @@
/* BiosRam Ranges at 0xfed80500 or I/O 0xcd4/0xcd5 */ #define BIOSRAM_CBMEM_TOP 0xf0 /* 4 bytes */ +#define BIOSRAM_UMA_SIZE 0xf4 /* 4 bytes */ +#define BIOSRAM_UMA_BASE 0xfa /* 8 bytes */
#endif /* __SOC_STONEYRIDGE_IOMAP_H__ */ diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index df78608..df1d755 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -340,6 +340,38 @@ uint32_t xhci_pm_read32(uint8_t reg); void bootblock_fch_early_init(void); /** + * @brief Save the UMA bize returned by AGESA + * + * @param size = in bytes + * + * @return none + */ +void save_uma_size(uint32_t size); +/** + * @brief Save the UMA base address returned by AGESA + * + * @param base = 64bit base address + * + * @return none + */ +void save_uma_base(uint64_t base); +/** + * @brief Get the saved UMA size + * + * @param none + * + * @return size in bytes + */ +int32_t get_uma_size(void); +/** + * @brief Get the saved UMA base + * + * @param none + * + * @return 64bit base address + */ +int64_t get_uma_base(void); +/** * @brief program a particular set of GPIO * * @param gpio_ptr = pointer to array of gpio configurations diff --git a/src/soc/amd/stoneyridge/sb_util.c b/src/soc/amd/stoneyridge/sb_util.c index a98a334..eda3fc8 100644 --- a/src/soc/amd/stoneyridge/sb_util.c +++ b/src/soc/amd/stoneyridge/sb_util.c @@ -164,3 +164,27 @@ { return acpi_sleep_from_pm1(inw(pm_acpi_pm_cnt_blk())); } + +void save_uma_size(uint32_t size) +{ + biosram_write32(BIOSRAM_UMA_SIZE, size); +} + +void save_uma_base(uint64_t base) +{ + biosram_write32(BIOSRAM_UMA_BASE, (uint32_t) base); + biosram_write32(BIOSRAM_UMA_BASE + 4, (uint32_t) (base >> 32)); +} + +int32_t get_uma_size(void) +{ + return biosram_read32(BIOSRAM_UMA_SIZE); +} + +int64_t get_uma_base(void) +{ + uint64_t base; + base = biosram_read32(BIOSRAM_UMA_BASE); + base |= ((uint64_t)(biosram_read32(BIOSRAM_UMA_BASE + 4)) << 32); + return base; +}