Patch set updated for coreboot: bce9312 CBFS: use cbfs_get_file_content whenever possible rather than cbfs_get_file
Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4674
-gerrit
commit bce9312f015913cf44a52e2d2c5d9f0f5d06575e Author: Vladimir Serbinenko phcoder@gmail.com Date: Sun Jan 12 14:12:15 2014 +0100
CBFS: use cbfs_get_file_content whenever possible rather than cbfs_get_file
Number one reason to use cbfs_get_file was to get file length. With prvious patch no more need for this.
Change-Id: I330dda914d800c991757c5967b11963276ba9e00 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/cpu/via/nano/update_ucode.c | 20 ++++++++++---------- src/mainboard/gizmosphere/gizmo/BiosCallOuts.c | 10 ++++++---- src/mainboard/google/bolt/romstage.c | 12 +++++++----- src/mainboard/google/butterfly/mainboard.c | 10 ++++++---- src/mainboard/google/falco/romstage.c | 12 +++++++----- src/mainboard/google/link/romstage.c | 12 +++++++----- src/mainboard/google/peppy/romstage.c | 12 +++++++----- src/mainboard/google/slippy/romstage.c | 12 +++++++----- src/mainboard/samsung/lumpy/romstage.c | 10 +++++----- src/northbridge/intel/i82830/vga.c | 18 +++--------------- src/southbridge/intel/lynxpoint/spi_loading.c | 16 ++++------------ src/vendorcode/google/chromeos/chromeos.c | 2 +- src/vendorcode/google/chromeos/chromeos.h | 2 +- 13 files changed, 71 insertions(+), 77 deletions(-)
diff --git a/src/cpu/via/nano/update_ucode.c b/src/cpu/via/nano/update_ucode.c index 7471928..aa0adeb 100644 --- a/src/cpu/via/nano/update_ucode.c +++ b/src/cpu/via/nano/update_ucode.c @@ -102,24 +102,24 @@ unsigned int nano_update_ucode(void) { size_t i; unsigned int n_updates = 0; - const struct cbfs_file *cbfs_ucode; u32 fms = cpuid_eax(0x1); + /* Considering we are running with eXecute-In-Place (XIP), there's no + * need to worry that accessing data from ROM will slow us down. + * Microcode data should be aligned to a 4-byte boundary, but CBFS + * already does that for us (Do you, CBFS?) */ + u32 *ucode_data; + size_t ucode_len;
- cbfs_ucode = cbfs_get_file(CBFS_DEFAULT_MEDIA, "cpu_microcode_blob.bin"); + ucode_data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, + "cpu_microcode_blob.bin", + CBFS_TYPE_MICROCODE, &ucode_len); /* Oops, did you forget to include the microcode ? */ - if(cbfs_ucode == NULL) { + if(ucode_data == NULL) { printk(BIOS_ALERT, "WARNING: No microcode file found in CBFS. " "Aborting microcode updates\n"); return 0; }
- /* Considering we are running with eXecute-In-Place (XIP), there's no - * need to worry that accessing data from ROM will slow us down. - * Microcode data should be aligned to a 4-byte boundary, but CBFS - * already does that for us (Do you, CBFS?) */ - const u32 *ucode_data = CBFS_SUBHEADER(cbfs_ucode); - const u32 ucode_len = ntohl(cbfs_ucode->len); - /* We might do a lot of loops searching for the microcode updates, but * keep in mind, nano_ucode_is_valid searches for the signature before * doing anything else. */ diff --git a/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c b/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c index bd593d8..ada7853 100755 --- a/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c +++ b/src/mainboard/gizmosphere/gizmo/BiosCallOuts.c @@ -444,16 +444,18 @@ AGESA_STATUS BiosReadSpd (UINT32 Func, UINT32 Data, VOID *ConfigPtr) if (info->DimmId != 0) return AGESA_UNSUPPORTED;
- struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len;
printk(BIOS_DEBUG, "read SPD\n"); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("file [spd.bin] not found in CBFS"); - if (spd_file->len < SPD_SIZE) + if (spd_file_len < SPD_SIZE) die("Missing SPD data.");
- memcpy((char*)info->Buffer, (char*)CBFS_SUBHEADER(spd_file), SPD_SIZE); + memcpy((char*)info->Buffer, spd_file, SPD_SIZE);
u16 crc = spd_ddr3_calc_crc(info->Buffer, SPD_SIZE);
diff --git a/src/mainboard/google/bolt/romstage.c b/src/mainboard/google/bolt/romstage.c index a74f10c..b698ec3 100644 --- a/src/mainboard/google/bolt/romstage.c +++ b/src/mainboard/google/bolt/romstage.c @@ -73,25 +73,27 @@ const struct rcba_config_instruction rcba_config[] = { /* Copy SPD data for on-board memory */ static void copy_spd(struct pei_data *peid) { - struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len; int spd_index = 0; /* No GPIO selection, force index 0 for now */
printk(BIOS_DEBUG, "SPD index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("SPD data not found.");
- if (ntohl(spd_file->len) < + if (spd_file_len < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); spd_index = 0; }
- if (spd_file->len < sizeof(peid->spd_data[0])) + if (spd_file_len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + + spd_file + spd_index * sizeof(peid->spd_data[0]), sizeof(peid->spd_data[0])); } diff --git a/src/mainboard/google/butterfly/mainboard.c b/src/mainboard/google/butterfly/mainboard.c index 1623fe0..f65d14c 100644 --- a/src/mainboard/google/butterfly/mainboard.c +++ b/src/mainboard/google/butterfly/mainboard.c @@ -299,7 +299,7 @@ static void verb_setup(void) static void mainboard_init(device_t dev) { u32 search_address = 0x0; - u32 search_length = -1; + size_t search_length = -1; u16 io_base = 0; struct device *ethernet_dev = NULL; #if CONFIG_CHROMEOS @@ -307,10 +307,12 @@ static void mainboard_init(device_t dev) search_length = find_fmap_entry("RO_VPD", (void **)vpd_region_ptr); search_address = (unsigned long)(*vpd_region_ptr); #else - struct cbfs_file *vpd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "vpd.bin"); + void *vpd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "vpd.bin", &search_length); if (vpd_file) { - search_length = ntohl(vpd_file->len); - search_address = (unsigned long)CBFS_SUBHEADER(vpd_file); + search_address = (unsigned long)vpd_file; + } else { + search_length = -1; + search_address = 0; } #endif
diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c index 0ad4b97..ca843e8 100644 --- a/src/mainboard/google/falco/romstage.c +++ b/src/mainboard/google/falco/romstage.c @@ -75,20 +75,22 @@ static void copy_spd(struct pei_data *peid) { const int gpio_vector[] = {13, 9, 47, -1}; int spd_index = get_gpios(gpio_vector); - struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len;
printk(BIOS_DEBUG, "SPD index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("SPD data not found.");
- if (ntohl(spd_file->len) < + if (spd_file_len < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); spd_index = 0; }
- if (spd_file->len < sizeof(peid->spd_data[0])) + if (spd_file_len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
/* Index 0-2 are 4GB config with both CH0 and CH1 @@ -98,7 +100,7 @@ static void copy_spd(struct pei_data *peid) peid->dimm_channel1_disabled = 3;
memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + + spd_file + spd_index * sizeof(peid->spd_data[0]), sizeof(peid->spd_data[0])); } diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c index 27a22f7..1aa309a 100644 --- a/src/mainboard/google/link/romstage.c +++ b/src/mainboard/google/link/romstage.c @@ -125,24 +125,26 @@ static void rcba_config(void) static void copy_spd(struct pei_data *peid) { const int gpio_vector[] = {41, 42, 43, 10, -1}; - struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len; int spd_index = get_gpios(gpio_vector);
printk(BIOS_DEBUG, "spd index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("SPD data not found.");
- if (ntohl(spd_file->len) < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { + if (spd_file_len < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { printk(BIOS_ERR, "spd index override to 0 - old hardware?\n"); spd_index = 0; }
- if (spd_file->len < sizeof(peid->spd_data[0])) + if (spd_file_len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + + spd_file + spd_index * sizeof(peid->spd_data[0]), sizeof(peid->spd_data[0])); } diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c index c6696c0..4e72326 100644 --- a/src/mainboard/google/peppy/romstage.c +++ b/src/mainboard/google/peppy/romstage.c @@ -78,10 +78,12 @@ static void copy_spd(struct pei_data *peid) { const int gpio_vector[] = {13, 9, 47, -1}; int spd_index = get_gpios(gpio_vector); - struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len;
printk(BIOS_DEBUG, "SPD index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("SPD data not found.");
@@ -101,17 +103,17 @@ static void copy_spd(struct pei_data *peid) break; }
- if (ntohl(spd_file->len) < + if (spd_file_len < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); spd_index = 0; }
- if (spd_file->len < sizeof(peid->spd_data[0])) + if (spd_file_len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + + spd_file + spd_index * sizeof(peid->spd_data[0]), sizeof(peid->spd_data[0])); } diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c index fdbac97..e2fa011 100644 --- a/src/mainboard/google/slippy/romstage.c +++ b/src/mainboard/google/slippy/romstage.c @@ -76,24 +76,26 @@ static void copy_spd(struct pei_data *peid) { const int gpio_vector[] = {13, 9, 47, -1}; int spd_index = get_gpios(gpio_vector); - struct cbfs_file *spd_file; + char *spd_file; + size_t spd_file_len;
printk(BIOS_DEBUG, "SPD index %d\n", spd_index); - spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); + spd_file = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); if (!spd_file) die("SPD data not found.");
- if (ntohl(spd_file->len) < + if (spd_file_len < ((spd_index + 1) * sizeof(peid->spd_data[0]))) { printk(BIOS_ERR, "SPD index override to 0 - old hardware?\n"); spd_index = 0; }
- if (spd_file->len < sizeof(peid->spd_data[0])) + if (spd_file_len < sizeof(peid->spd_data[0])) die("Missing SPD data.");
memcpy(peid->spd_data[0], - ((char*)CBFS_SUBHEADER(spd_file)) + + spd_file + spd_index * sizeof(peid->spd_data[0]), sizeof(peid->spd_data[0])); } diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c index 6c87f88..a4f0c42 100644 --- a/src/mainboard/samsung/lumpy/romstage.c +++ b/src/mainboard/samsung/lumpy/romstage.c @@ -182,8 +182,8 @@ void main(unsigned long bist) };
typedef const uint8_t spd_blob[256]; - struct cbfs_file *spd_file; spd_blob *spd_data; + size_t spd_file_len;
timestamp_init(get_initial_timestamp()); @@ -289,12 +289,12 @@ void main(unsigned long bist) break; }
- spd_file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "spd.bin"); - if (!spd_file) + spd_data = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "spd.bin", 0xab, + &spd_file_len); + if (!spd_data) die("SPD data not found."); - if (spd_file->len < (spd_index + 1) * 256) + if (spd_file_len < (spd_index + 1) * 256) die("Missing SPD data."); - spd_data = (spd_blob *)CBFS_SUBHEADER(spd_file); // leave onboard dimm address at f0, and copy spd data there. memcpy(pei_data.spd_data[0], spd_data[spd_index], 256);
diff --git a/src/northbridge/intel/i82830/vga.c b/src/northbridge/intel/i82830/vga.c index 49bfa34..40f23cc 100644 --- a/src/northbridge/intel/i82830/vga.c +++ b/src/northbridge/intel/i82830/vga.c @@ -32,21 +32,9 @@ static void vga_init(device_t dev) { printk(BIOS_INFO, "Starting Graphics Initialization\n"); - struct cbfs_file *file = cbfs_get_file(CBFS_DEFAULT_MEDIA, "mbi.bin"); - void *mbi = NULL; - unsigned int mbi_len = 0; - - if (file) { - if (ntohl(file->type) != CBFS_TYPE_MBI) { - printk(BIOS_INFO, "CBFS: MBI binary is of type %x instead of" - "type %x\n", file->type, CBFS_TYPE_MBI); - } else { - mbi = (void *) CBFS_SUBHEADER(file); - mbi_len = ntohl(file->len); - } - } else { - printk(BIOS_INFO, "Could not find MBI.\n"); - } + size_t mbi_len; + void *mbi = cbfs_get_file_content(CBFS_DEFAULT_MEDIA, "mbi.bin", + CBFS_TYPE_MBI, &mbi_len);
if (mbi && mbi_len) { /* The GDT or coreboot table is going to live here. But diff --git a/src/southbridge/intel/lynxpoint/spi_loading.c b/src/southbridge/intel/lynxpoint/spi_loading.c index 1ae7a26..57e3af8 100644 --- a/src/southbridge/intel/lynxpoint/spi_loading.c +++ b/src/southbridge/intel/lynxpoint/spi_loading.c @@ -28,7 +28,7 @@ #if CONFIG_VBOOT_VERIFY_FIRMWARE #include <vendorcode/google/chromeos/chromeos.h> #else -static inline void *vboot_get_payload(int *len) { return NULL; } +static inline void *vboot_get_payload(size_t *len) { return NULL; } #endif
#define CACHELINE_SIZE 64 @@ -73,26 +73,18 @@ static inline void *spi_mirror(void *file_start, int file_len)
void *cbfs_load_payload(struct cbfs_media *media, const char *name) { - int file_len; + size_t file_len; void *file_start; - struct cbfs_file *file;
file_start = vboot_get_payload(&file_len);
if (file_start != NULL) return spi_mirror(file_start, file_len);
- file = cbfs_get_file(media, name); + file_start = cbfs_get_file_content(media, name, CBFS_TYPE_PAYLOAD, &file_len);
- if (file == NULL) + if (file_start == NULL) return NULL;
- if (ntohl(file->type) != CBFS_TYPE_PAYLOAD) - return NULL; - - file_len = ntohl(file->len); - - file_start = CBFS_SUBHEADER(file); - return spi_mirror(file_start, file_len); } diff --git a/src/vendorcode/google/chromeos/chromeos.c b/src/vendorcode/google/chromeos/chromeos.c index 828cfd2..54fe8db 100644 --- a/src/vendorcode/google/chromeos/chromeos.c +++ b/src/vendorcode/google/chromeos/chromeos.c @@ -82,7 +82,7 @@ int recovery_mode_enabled(void) }
#if CONFIG_VBOOT_VERIFY_FIRMWARE -void *vboot_get_payload(int *len) +void *vboot_get_payload(size_t *len) { struct vboot_handoff *vboot_handoff; struct firmware_component *fwc; diff --git a/src/vendorcode/google/chromeos/chromeos.h b/src/vendorcode/google/chromeos/chromeos.h index d241085..ae715dc 100644 --- a/src/vendorcode/google/chromeos/chromeos.h +++ b/src/vendorcode/google/chromeos/chromeos.h @@ -48,7 +48,7 @@ void init_chromeos(int bootmode); #if CONFIG_VBOOT_VERIFY_FIRMWARE struct romstage_handoff; void vboot_verify_firmware(struct romstage_handoff *handoff); -void *vboot_get_payload(int *len); +void *vboot_get_payload(size_t *len); /* Returns 0 on success < 0 on error. */ int vboot_get_handoff_info(void **addr, uint32_t *size); #endif
-
Vladimir Serbinenko