Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/39798 )
Change subject: mb/lenovo: Add additional FMAPs for stripped ME ......................................................................
mb/lenovo: Add additional FMAPs for stripped ME
Make it easier to use measured boot with stripped ME by providing the corresponding FMAPs.
Change-Id: I1763583a42bbc91e6acc06b262deab10d34447a3 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com --- A src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd 7 files changed, 147 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/39798/1
diff --git a/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +}
Marcello Sylvester Bauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39798 )
Change subject: mb/lenovo: Add additional FMAPs for stripped ME ......................................................................
Patch Set 1: Code-Review+1
Tested with X230
Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/39798 )
Change subject: mb/lenovo: Add additional FMAPs for stripped ME ......................................................................
Patch Set 1: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/39798 )
Change subject: mb/lenovo: Add additional FMAPs for stripped ME ......................................................................
mb/lenovo: Add additional FMAPs for stripped ME
Make it easier to use measured boot with stripped ME by providing the corresponding FMAPs.
Change-Id: I1763583a42bbc91e6acc06b262deab10d34447a3 Signed-off-by: Patrick Rudolph patrick.rudolph@9elements.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/39798 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Marcello Sylvester Bauer sylv@sylv.io Reviewed-by: Philipp Deppenwiese zaolin.daisuki@gmail.com --- A src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd A src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd A src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd 7 files changed, 147 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved Marcello Sylvester Bauer: Looks good to me, but someone else must approve
diff --git a/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t430/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t430s/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t440p/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/t530/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x131e/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x1_carbon_gen1/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd new file mode 100644 index 0000000..565cacd --- /dev/null +++ b/src/mainboard/lenovo/x230/vboot-ro-me_clean.fmd @@ -0,0 +1,21 @@ +FLASH@0xff400000 0xc00000 { + SI_ALL 0x20000 { + SI_DESC 0x1000 + SI_GBE 0x2000 + SI_ME + } + SI_BIOS 0xbe0000 { + UNIFIED_MRC_CACHE 0x20000 { + RECOVERY_MRC_CACHE 0x10000 + RW_MRC_CACHE 0x10000 + } + + WP_RO { + FMAP 0x800 + RO_FRID 0x40 + RO_PADDING 0x7c0 + GBB 0x1e000 + COREBOOT(CBFS) + } + } +}
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Marcello Sylvester Bauer (Code Review) -
Patrick Georgi (Code Review)
-
Patrick Rudolph (Code Review)
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Philipp Deppenwiese (Code Review)