Change in ...coreboot[master]: src/{arch/arm64,soc/intel}: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32122

Change subject: src/{arch/arm64,soc/intel}: Add missing include 'console.h'
......................................................................

src/{arch/arm64,soc/intel}: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/arm_tf.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
7 files changed, 8 insertions(+), 1 deletion(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32122/1

diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c
index 7cf173b..f43bc02 100644
--- a/src/arch/arm64/arm_tf.c
+++ b/src/arch/arm64/arm_tf.c
@@ -21,6 +21,7 @@
 #include <assert.h>
 #include <bootmem.h>
 #include <cbfs.h>
+#include <console/console.h>
 #include <program_loading.h>

/*
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 07cb2ad..9696a58 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -18,6 +18,7 @@

#include <arch/acpi.h>
 #include <arch/acpigen.h>
+#include <console/console.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci_ops.h>
@@ -34,6 +35,7 @@
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
 #include <string.h>
+
 #include "chip.h"

#define CSTATE_RES(address_space, width, offset, address)		\
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
index e8e2661..1a31e20 100644
--- a/src/soc/intel/apollolake/uart.c
+++ b/src/soc/intel/apollolake/uart.c
@@ -21,6 +21,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <intelblocks/uart.h>
 #include <soc/gpio.h>
 #include <soc/pci_devs.h>
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c
index 421cafc..1b72b24 100644
--- a/src/soc/intel/cannonlake/uart.c
+++ b/src/soc/intel/cannonlake/uart.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index f3e91ff..e969a04 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -26,7 +26,7 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
-
+#include <console/console.h>
 #include <intelblocks/acpi.h>
 #include <soc/acpi.h>
 #include <soc/cpu.h>
diff --git a/src/soc/intel/icelake/uart.c b/src/soc/intel/icelake/uart.c
index 421cafc..1b72b24 100644
--- a/src/soc/intel/icelake/uart.c
+++ b/src/soc/intel/icelake/uart.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c
index 83bed34..2cb5adf 100644
--- a/src/soc/intel/quark/acpi.c
+++ b/src/soc/intel/quark/acpi.c
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <soc/acpi.h>
 #include <soc/ramstage.h>

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src/{arch/arm64,soc/intel}: Add missing include 'console.h'
......................................................................

Set Ready For Review

Change in ...coreboot[master]: src: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, Piotr Król, Julius Werner, build bot (Jenkins), Philipp Hug, ron minnich, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, Michał Żygowski, David Guckian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32122

to look at the new patch set (#3).

Change subject: src: Add missing include 'console.h'
......................................................................

src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/arm_tf.c
M src/arch/riscv/boot.c
M src/commonlib/storage/sdhci_adma.c
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/heapmanager.c
M src/drivers/amd/agesa/oem_s3.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/drivers/spi/spi_flash.c
M src/lib/generic_dump_spd.c
M src/mainboard/amd/bettong/BiosCallOuts.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/bap/ode_e21XX/BiosCallOuts.c
M src/mainboard/biostar/am1ml/BiosCallOuts.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/google/poppy/variants/nami/mainboard.c
M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
M src/mainboard/lippert/toucan-af/BiosCallOuts.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/northbridge/amd/agesa/family14/state_machine.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct/mcttmrl.c
M src/northbridge/amd/pi/agesawrapper.c
M src/northbridge/via/vx900/memmap.c
M src/northbridge/via/vx900/pci_util.c
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/common/block/pi/def_callouts.c
M src/soc/amd/common/block/pi/refcode_loader.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/ramtop.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/include/soc/hob_mem.h
M src/soc/intel/fsp_baytrail/i2c.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
M src/soc/mediatek/common/spi.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/i2c.c
M src/soc/mediatek/mt8173/pmic_wrap.c
M src/soc/mediatek/mt8173/rtc.c
M src/soc/mediatek/mt8183/mt6358.c
M src/soc/mediatek/mt8183/rtc.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/rockchip/rk3288/crypto.c
M src/southbridge/amd/agesa/hudson/resume.c
M src/southbridge/amd/agesa/hudson/smbus.c
M src/southbridge/amd/agesa/hudson/smbus_spd.c
M src/southbridge/amd/cimx/sb900/cfg.c
M src/southbridge/amd/pi/hudson/smbus.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/amd/sb800/smbus.c
M src/southbridge/broadcom/bcm5785/early_smbus.c
64 files changed, 79 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32122/3

Change in ...coreboot[master]: src: Add missing include 'console.h'

[David Guckian (Code Review)]

David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 3: Code-Review+1

Change in ...coreboot[master]: src: Add missing include 'console.h'

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 3: Code-Review+1

Change in ...coreboot[master]: src: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

Hello Patrick Rudolph, Piotr Król, Julius Werner, Paul Menzel, build bot (Jenkins), Philipp Hug, ron minnich, David Guckian, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, Michał Żygowski, David Guckian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32122

to look at the new patch set (#5).

Change subject: src: Add missing include 'console.h'
......................................................................

src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/arm_tf.c
M src/arch/riscv/boot.c
M src/commonlib/storage/sdhci_adma.c
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/heapmanager.c
M src/drivers/amd/agesa/oem_s3.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/drivers/spi/spi_flash.c
M src/lib/generic_dump_spd.c
M src/mainboard/amd/bettong/BiosCallOuts.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/bap/ode_e21XX/BiosCallOuts.c
M src/mainboard/biostar/am1ml/BiosCallOuts.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/google/poppy/variants/nami/mainboard.c
M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
M src/mainboard/lippert/toucan-af/BiosCallOuts.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/northbridge/amd/agesa/family14/state_machine.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct/mcttmrl.c
M src/northbridge/amd/pi/agesawrapper.c
M src/northbridge/via/vx900/memmap.c
M src/northbridge/via/vx900/pci_util.c
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/common/block/pi/def_callouts.c
M src/soc/amd/common/block/pi/refcode_loader.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/ramtop.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/include/soc/hob_mem.h
M src/soc/intel/fsp_baytrail/i2c.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
M src/soc/mediatek/common/spi.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/i2c.c
M src/soc/mediatek/mt8173/pmic_wrap.c
M src/soc/mediatek/mt8173/rtc.c
M src/soc/mediatek/mt8183/mt6358.c
M src/soc/mediatek/mt8183/rtc.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/rockchip/rk3288/crypto.c
M src/southbridge/amd/agesa/hudson/resume.c
M src/southbridge/amd/agesa/hudson/smbus.c
M src/southbridge/amd/agesa/hudson/smbus_spd.c
M src/southbridge/amd/cimx/sb900/cfg.c
M src/southbridge/amd/pi/hudson/smbus.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/amd/sb800/smbus.c
M src/southbridge/broadcom/bcm5785/early_smbus.c
64 files changed, 79 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32122/5

Change in ...coreboot[master]: src: Add missing include 'console.h'

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 5: Code-Review+2

Change in ...coreboot[master]: src: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

Hello Kyösti Mälkki, Patrick Rudolph, Piotr Król, Julius Werner, Paul Menzel, build bot (Jenkins), Philipp Hug, Werner Zeh, ron minnich, David Guckian, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, Michał Żygowski, David Guckian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32122

to look at the new patch set (#6).

Change subject: src: Add missing include 'console.h'
......................................................................

src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/arm_tf.c
M src/arch/riscv/boot.c
M src/commonlib/storage/sdhci_adma.c
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/heapmanager.c
M src/drivers/amd/agesa/oem_s3.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/drivers/spi/spi_flash.c
M src/lib/generic_dump_spd.c
M src/mainboard/amd/bettong/BiosCallOuts.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/bap/ode_e21XX/BiosCallOuts.c
M src/mainboard/biostar/am1ml/BiosCallOuts.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/google/poppy/variants/nami/mainboard.c
M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
M src/mainboard/lippert/toucan-af/BiosCallOuts.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/northbridge/amd/agesa/family14/state_machine.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct/mcttmrl.c
M src/northbridge/amd/pi/agesawrapper.c
M src/northbridge/via/vx900/memmap.c
M src/northbridge/via/vx900/pci_util.c
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/common/block/pi/def_callouts.c
M src/soc/amd/common/block/pi/refcode_loader.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/ramtop.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/include/soc/hob_mem.h
M src/soc/intel/fsp_baytrail/i2c.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
M src/soc/mediatek/common/spi.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/i2c.c
M src/soc/mediatek/mt8173/pmic_wrap.c
M src/soc/mediatek/mt8173/rtc.c
M src/soc/mediatek/mt8183/mt6358.c
M src/soc/mediatek/mt8183/rtc.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/rockchip/rk3288/crypto.c
M src/southbridge/amd/agesa/hudson/resume.c
M src/southbridge/amd/agesa/hudson/smbus.c
M src/southbridge/amd/agesa/hudson/smbus_spd.c
M src/southbridge/amd/cimx/sb900/cfg.c
M src/southbridge/amd/pi/hudson/smbus.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/amd/sb800/smbus.c
M src/southbridge/broadcom/bcm5785/early_smbus.c
64 files changed, 79 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32122/6

Change in ...coreboot[master]: src: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 6:

rebased on master to solve "Merge Conflict"

Change in ...coreboot[master]: src: Add missing include 'console.h'

[Werner Zeh (Code Review)]

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 6:

(5 comments)

https://review.coreboot.org/#/c/32122/6/src/soc/mediatek/mt8173/rtc.c 
File src/soc/mediatek/mt8173/rtc.c:

https://review.coreboot.org/#/c/32122/6/src/soc/mediatek/mt8173/rtc.c@17 
PS6, Line 17: #include <console/console.h>
Do you really need it here? The only things that are printed here are done so using rtc_info() wrapper. This wrapper is defined in soc/rtc_common.h where console/console.h is already included. Or have I missed something?

https://review.coreboot.org/#/c/32122/6/src/soc/mediatek/mt8183/rtc.c 
File src/soc/mediatek/mt8183/rtc.c:

https://review.coreboot.org/#/c/32122/6/src/soc/mediatek/mt8183/rtc.c@17 
PS6, Line 17: #include <console/console.h>
Same here

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/agesa/hudson/smb... 
File src/southbridge/amd/agesa/hudson/smbus.c:

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/agesa/hudson/smb... 
PS6, Line 20: #include <console/console.h>
I don't see this necessary here. All the printk() calls here are commented out.

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/pi/hudson/smbus.... 
File src/southbridge/amd/pi/hudson/smbus.c:

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/pi/hudson/smbus.... 
PS6, Line 20: #include <console/console.h>
printk()-calls commented out here as well so this should not be needed?

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/sb800/smbus.c 
File src/southbridge/amd/sb800/smbus.c:

https://review.coreboot.org/#/c/32122/6/src/southbridge/amd/sb800/smbus.c@20 
PS6, Line 20: #include <console/console.h>
here, too

Change in ...coreboot[master]: src: Add missing include 'console.h'

[HAOUAS Elyes (Code Review)]

Hello Kyösti Mälkki, Patrick Rudolph, Piotr Król, Julius Werner, Paul Menzel, build bot (Jenkins), Philipp Hug, Werner Zeh, ron minnich, David Guckian, Vanny E, Huang Jin, Jonathan Neuschäfer, Philipp Deppenwiese, Michał Żygowski, David Guckian,

I'd like you to reexamine a change. Please visit

https://review.coreboot.org/c/coreboot/+/32122

to look at the new patch set (#7).

Change subject: src: Add missing include 'console.h'
......................................................................

src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
---
M src/arch/arm64/arm_tf.c
M src/arch/riscv/boot.c
M src/commonlib/storage/sdhci_adma.c
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/heapmanager.c
M src/drivers/amd/agesa/oem_s3.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/drivers/spi/spi_flash.c
M src/lib/generic_dump_spd.c
M src/mainboard/amd/bettong/BiosCallOuts.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/bap/ode_e21XX/BiosCallOuts.c
M src/mainboard/biostar/am1ml/BiosCallOuts.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/google/poppy/variants/nami/mainboard.c
M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
M src/mainboard/lippert/toucan-af/BiosCallOuts.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/northbridge/amd/agesa/family14/state_machine.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct/mcttmrl.c
M src/northbridge/amd/pi/agesawrapper.c
M src/northbridge/via/vx900/memmap.c
M src/northbridge/via/vx900/pci_util.c
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/common/block/pi/def_callouts.c
M src/soc/amd/common/block/pi/refcode_loader.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/ramtop.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/include/soc/hob_mem.h
M src/soc/intel/fsp_baytrail/i2c.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
M src/soc/mediatek/common/spi.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/i2c.c
M src/soc/mediatek/mt8173/pmic_wrap.c
M src/soc/mediatek/mt8183/mt6358.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/rockchip/rk3288/crypto.c
M src/southbridge/amd/agesa/hudson/resume.c
M src/southbridge/amd/agesa/hudson/smbus_spd.c
M src/southbridge/amd/cimx/sb900/cfg.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/broadcom/bcm5785/early_smbus.c
59 files changed, 71 insertions(+), 15 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/32122/7

Change in ...coreboot[master]: src: Add missing include 'console.h'

[Werner Zeh (Code Review)]

Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

Patch Set 7: Code-Review+2

Change in ...coreboot[master]: src: Add missing include 'console.h'

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/32122 )

Change subject: src: Add missing include 'console.h'
......................................................................

src: Add missing include 'console.h'

Change-Id: Ie21c390ab04adb5b05d5f9760d227d2a175ccb56
Signed-off-by: Elyes HAOUAS 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32122
Tested-by: build bot (Jenkins) 
Reviewed-by: Werner Zeh 
---
M src/arch/arm64/arm_tf.c
M src/arch/riscv/boot.c
M src/commonlib/storage/sdhci_adma.c
M src/cpu/amd/family_10h-family_15h/fidvid.c
M src/cpu/amd/family_10h-family_15h/init_cpus.c
M src/cpu/amd/family_10h-family_15h/init_cpus.h
M src/drivers/amd/agesa/def_callouts.c
M src/drivers/amd/agesa/heapmanager.c
M src/drivers/amd/agesa/oem_s3.c
M src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
M src/drivers/spi/spi_flash.c
M src/lib/generic_dump_spd.c
M src/mainboard/amd/bettong/BiosCallOuts.c
M src/mainboard/bap/ode_e20XX/BiosCallOuts.c
M src/mainboard/bap/ode_e21XX/BiosCallOuts.c
M src/mainboard/biostar/am1ml/BiosCallOuts.c
M src/mainboard/foxconn/g41s-k/romstage.c
M src/mainboard/google/poppy/variants/nami/mainboard.c
M src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
M src/mainboard/lippert/toucan-af/BiosCallOuts.c
M src/mainboard/pcengines/apu1/BiosCallOuts.c
M src/mainboard/pcengines/apu2/BiosCallOuts.c
M src/northbridge/amd/agesa/family14/state_machine.c
M src/northbridge/amd/amdmct/mct/mct_d.c
M src/northbridge/amd/amdmct/mct/mctdqs_d.c
M src/northbridge/amd/amdmct/mct/mcttmrl.c
M src/northbridge/amd/pi/agesawrapper.c
M src/northbridge/via/vx900/memmap.c
M src/northbridge/via/vx900/pci_util.c
M src/soc/amd/common/block/pi/agesawrapper.c
M src/soc/amd/common/block/pi/def_callouts.c
M src/soc/amd/common/block/pi/refcode_loader.c
M src/soc/amd/stoneyridge/BiosCallOuts.c
M src/soc/amd/stoneyridge/ramtop.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/intel/apollolake/acpi.c
M src/soc/intel/apollolake/uart.c
M src/soc/intel/cannonlake/uart.c
M src/soc/intel/common/block/acpi/acpi.c
M src/soc/intel/common/block/cpu/mp_init.c
M src/soc/intel/common/block/gpio/gpio.c
M src/soc/intel/denverton_ns/acpi.c
M src/soc/intel/denverton_ns/include/soc/hob_mem.h
M src/soc/intel/fsp_baytrail/i2c.c
M src/soc/intel/icelake/uart.c
M src/soc/intel/quark/acpi.c
M src/soc/mediatek/common/spi.c
M src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
M src/soc/mediatek/mt8173/i2c.c
M src/soc/mediatek/mt8173/pmic_wrap.c
M src/soc/mediatek/mt8183/mt6358.c
M src/soc/nvidia/tegra210/funitcfg.c
M src/soc/nvidia/tegra210/ramstage.c
M src/soc/rockchip/rk3288/crypto.c
M src/southbridge/amd/agesa/hudson/resume.c
M src/southbridge/amd/agesa/hudson/smbus_spd.c
M src/southbridge/amd/cimx/sb900/cfg.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/broadcom/bcm5785/early_smbus.c
59 files changed, 71 insertions(+), 15 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Werner Zeh: Looks good to me, approved

diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c
index 7cf173b..f43bc02 100644
--- a/src/arch/arm64/arm_tf.c
+++ b/src/arch/arm64/arm_tf.c
@@ -21,6 +21,7 @@
 #include <assert.h>
 #include <bootmem.h>
 #include <cbfs.h>
+#include <console/console.h>
 #include <program_loading.h>

/*
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index 29064b1..edf5295 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -17,7 +17,6 @@
 #include <vm.h>
 #include <arch/boot.h>
 #include <arch/encoding.h>
-#include <console/console.h>
 #include <arch/smp/smp.h>
 #include <mcall.h>

diff --git a/src/commonlib/storage/sdhci_adma.c b/src/commonlib/storage/sdhci_adma.c
index 1bae3fb..bf6f457 100644
--- a/src/commonlib/storage/sdhci_adma.c
+++ b/src/commonlib/storage/sdhci_adma.c
@@ -20,6 +20,7 @@
 #include <assert.h>
 #include <commonlib/sdhci.h>
 #include <commonlib/storage.h>
+#include <console/console.h>
 #include <delay.h>
 #include <endian.h>
 #include <string.h>
diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c
index 579cae5..2c6e08c 100644
--- a/src/cpu/amd/family_10h-family_15h/fidvid.c
+++ b/src/cpu/amd/family_10h-family_15h/fidvid.c
@@ -89,6 +89,7 @@

*/

+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <inttypes.h>
 #include <northbridge/amd/amdht/AsPsDefs.h>
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c
index 76bc6d9..719d62f 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.c
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c
@@ -14,6 +14,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <device/pci_ops.h>
 #include "init_cpus.h"
diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h
index d09fc82..5d653d1 100644
--- a/src/cpu/amd/family_10h-family_15h/init_cpus.h
+++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h
@@ -17,7 +17,6 @@
 #define INIT_CPUS_H

#include <stdlib.h>
-#include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/amd/msr.h>
diff --git a/src/drivers/amd/agesa/def_callouts.c b/src/drivers/amd/agesa/def_callouts.c
index 92ccff8..fa41500 100644
--- a/src/drivers/amd/agesa/def_callouts.c
+++ b/src/drivers/amd/agesa/def_callouts.c
@@ -15,6 +15,7 @@
  */

#include <cbfs.h>
+#include <console/console.h>
 #include <spd_bin.h>
 #include <string.h>

diff --git a/src/drivers/amd/agesa/heapmanager.c b/src/drivers/amd/agesa/heapmanager.c
index a38696f..513e804 100644
--- a/src/drivers/amd/agesa/heapmanager.c
+++ b/src/drivers/amd/agesa/heapmanager.c
@@ -20,6 +20,7 @@
 #include <northbridge/amd/agesa/BiosCallOuts.h>

#include <arch/acpi.h>
+#include <console/console.h>
 #include <string.h>

/* BIOS_HEAP_START_ADDRESS is only for cold boots. */
diff --git a/src/drivers/amd/agesa/oem_s3.c b/src/drivers/amd/agesa/oem_s3.c
index 586189b..acd34b8 100644
--- a/src/drivers/amd/agesa/oem_s3.c
+++ b/src/drivers/amd/agesa/oem_s3.c
@@ -17,6 +17,7 @@
 #include <spi_flash.h>
 #include <string.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <program_loading.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <AGESA.h>
diff --git a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
index fe6c4b3..00f6307 100644
--- a/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
+++ b/src/drivers/intel/fsp2_0/ppi/mp_service_ppi.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mp.h>
 #include <cpu/x86/lapic.h>
diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c
index 82398dd..fc831c3 100644
--- a/src/drivers/spi/spi_flash.c
+++ b/src/drivers/spi/spi_flash.c
@@ -10,6 +10,7 @@
 #include <arch/early_variables.h>
 #include <assert.h>
 #include <boot_device.h>
+#include <console/console.h>
 #include <cpu/x86/smm.h>
 #include <stdlib.h>
 #include <string.h>
diff --git a/src/lib/generic_dump_spd.c b/src/lib/generic_dump_spd.c
index 63e47a2..fdde026 100644
--- a/src/lib/generic_dump_spd.c
+++ b/src/lib/generic_dump_spd.c
@@ -3,6 +3,8 @@
  * It should go away either there or here, depending what fits better.
  */

+#include <console/console.h>
+
 static void dump_spd_registers(const struct mem_controller *ctrl)
 {
    int i;
diff --git a/src/mainboard/amd/bettong/BiosCallOuts.c b/src/mainboard/amd/bettong/BiosCallOuts.c
index e4020b0..d318d0c 100644
--- a/src/mainboard/amd/bettong/BiosCallOuts.c
+++ b/src/mainboard/amd/bettong/BiosCallOuts.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <AGESA.h>
diff --git a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
index 9f7fbf8..4f5ab88 100644
--- a/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
+++ b/src/mainboard/bap/ode_e20XX/BiosCallOuts.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <AGESA.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <northbridge/amd/agesa/state_machine.h>
diff --git a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
index 1d86d53..6458b97 100644
--- a/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
+++ b/src/mainboard/bap/ode_e21XX/BiosCallOuts.c
@@ -14,6 +14,7 @@
  */

#include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <FchPlatform.h>
 #include <stdlib.h>
diff --git a/src/mainboard/biostar/am1ml/BiosCallOuts.c b/src/mainboard/biostar/am1ml/BiosCallOuts.c
index 43db0d7..17c25ae 100644
--- a/src/mainboard/biostar/am1ml/BiosCallOuts.c
+++ b/src/mainboard/biostar/am1ml/BiosCallOuts.c
@@ -16,6 +16,7 @@

#include <device/azalia.h>
 #include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <FchPlatform.h>
diff --git a/src/mainboard/foxconn/g41s-k/romstage.c b/src/mainboard/foxconn/g41s-k/romstage.c
index 01c6edd..ec4541f 100644
--- a/src/mainboard/foxconn/g41s-k/romstage.c
+++ b/src/mainboard/foxconn/g41s-k/romstage.c
@@ -16,6 +16,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <cpu/x86/bist.h>
 #include <cpu/intel/romstage.h>
 #include <device/pci_ops.h>
diff --git a/src/mainboard/google/poppy/variants/nami/mainboard.c b/src/mainboard/google/poppy/variants/nami/mainboard.c
index 836c97e..dff62c2 100644
--- a/src/mainboard/google/poppy/variants/nami/mainboard.c
+++ b/src/mainboard/google/poppy/variants/nami/mainboard.c
@@ -19,6 +19,7 @@
 #include <cbfs.h>
 #include <chip.h>
 #include <commonlib/cbfs_serialized.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <drivers/intel/gma/opregion.h>
 #include <ec/google/chromeec/ec.h>
diff --git a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
index eca687c..9ce9ec7 100644
--- a/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/frontrunner-af/BiosCallOuts.c
@@ -14,6 +14,7 @@
  */

#include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>
diff --git a/src/mainboard/lippert/toucan-af/BiosCallOuts.c b/src/mainboard/lippert/toucan-af/BiosCallOuts.c
index 4841008..7e6d0c4 100644
--- a/src/mainboard/lippert/toucan-af/BiosCallOuts.c
+++ b/src/mainboard/lippert/toucan-af/BiosCallOuts.c
@@ -14,6 +14,7 @@
  */

#include <AGESA.h>
+#include <console/console.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <southbridge/amd/cimx/sb800/gpio_oem.h>
diff --git a/src/mainboard/pcengines/apu1/BiosCallOuts.c b/src/mainboard/pcengines/apu1/BiosCallOuts.c
index 906ecb6..df5f037 100644
--- a/src/mainboard/pcengines/apu1/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu1/BiosCallOuts.c
@@ -13,11 +13,13 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <AGESA.h>
 #include <spd_bin.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <SB800.h>
 #include <stdlib.h>
+
 #include "gpio_ftns.h"

static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr);
diff --git a/src/mainboard/pcengines/apu2/BiosCallOuts.c b/src/mainboard/pcengines/apu2/BiosCallOuts.c
index 535024a..edacb22 100644
--- a/src/mainboard/pcengines/apu2/BiosCallOuts.c
+++ b/src/mainboard/pcengines/apu2/BiosCallOuts.c
@@ -14,6 +14,7 @@
  */

#include <AGESA.h>
+#include <console/console.h>
 #include <spd_bin.h>
 #include <northbridge/amd/agesa/BiosCallOuts.h>
 #include <FchPlatform.h>
diff --git a/src/northbridge/amd/agesa/family14/state_machine.c b/src/northbridge/amd/agesa/family14/state_machine.c
index d29656c..df55efa 100644
--- a/src/northbridge/amd/agesa/family14/state_machine.c
+++ b/src/northbridge/amd/agesa/family14/state_machine.c
@@ -15,17 +15,16 @@

#include <Porting.h>
 #include <AGESA.h>
-
 #include <arch/io.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
+#include <console/console.h>
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <smp/node.h>
 #include <northbridge/amd/agesa/state_machine.h>
 #include <northbridge/amd/agesa/agesa_helper.h>
-
 #include <sb_cimx.h>

void platform_BeforeInitReset(struct sysinfo *cb, AMD_RESET_PARAMS *Reset)
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index d956315..629bc0f 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -34,8 +34,10 @@
  */

#include <string.h>
+#include <console/console.h>
 #include <cpu/amd/msr.h>
 #include <device/pci_ops.h>
+
 #include "mct_d.h"

static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat,
diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c
index 75fc8a4..e2dd56f 100644
--- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c
+++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c
@@ -13,9 +13,11 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <cpu/x86/cr.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
+
 #include "mct_d.h"

static void CalcEccDQSPos_D(struct MCTStatStruc *pMCTstat,
diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c
index 192288a..a78d42d 100644
--- a/src/northbridge/amd/amdmct/mct/mcttmrl.c
+++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c
@@ -13,8 +13,10 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <cpu/x86/cr.h>
 #include <cpu/amd/msr.h>
+
 #include "mct_d.h"

/*
diff --git a/src/northbridge/amd/pi/agesawrapper.c b/src/northbridge/amd/pi/agesawrapper.c
index cda5e01..1563216 100644
--- a/src/northbridge/amd/pi/agesawrapper.c
+++ b/src/northbridge/amd/pi/agesawrapper.c
@@ -17,6 +17,7 @@
 #include <cbfs.h>
 #include <cbmem.h>
 #include <delay.h>
+#include <console/console.h>
 #include <cpu/x86/mtrr.h>
 #include <FchPlatform.h>
 #include <heapManager.h>
diff --git a/src/northbridge/via/vx900/memmap.c b/src/northbridge/via/vx900/memmap.c
index 18d9635..0c3b7bf 100644
--- a/src/northbridge/via/vx900/memmap.c
+++ b/src/northbridge/via/vx900/memmap.c
@@ -17,11 +17,12 @@

#define __SIMPLE_DEVICE__

-#include "vx900.h"
-
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
+#include <console/console.h>
+
+#include "vx900.h"

#define MCU PCI_DEV(0, 0, 3)

diff --git a/src/northbridge/via/vx900/pci_util.c b/src/northbridge/via/vx900/pci_util.c
index afd35a1..07a9a71 100644
--- a/src/northbridge/via/vx900/pci_util.c
+++ b/src/northbridge/via/vx900/pci_util.c
@@ -14,6 +14,8 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
+
 #include "vx900.h"

#ifdef __SIMPLE_DEVICE__
diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c
index 1b9e0fc..d65400e 100644
--- a/src/soc/amd/common/block/pi/agesawrapper.c
+++ b/src/soc/amd/common/block/pi/agesawrapper.c
@@ -16,6 +16,7 @@

#include <arch/acpi.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <timestamp.h>
 #include <amdblocks/s3_resume.h>
 #include <amdblocks/agesawrapper.h>
diff --git a/src/soc/amd/common/block/pi/def_callouts.c b/src/soc/amd/common/block/pi/def_callouts.c
index 0b119b7..6734b55 100644
--- a/src/soc/amd/common/block/pi/def_callouts.c
+++ b/src/soc/amd/common/block/pi/def_callouts.c
@@ -15,6 +15,7 @@
  */

#include <cbfs.h>
+#include <console/console.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/mp.h>
 #include <timer.h>
diff --git a/src/soc/amd/common/block/pi/refcode_loader.c b/src/soc/amd/common/block/pi/refcode_loader.c
index 47402b6..3ffaf36 100644
--- a/src/soc/amd/common/block/pi/refcode_loader.c
+++ b/src/soc/amd/common/block/pi/refcode_loader.c
@@ -16,6 +16,7 @@
 #include <arch/acpi.h>
 #include <cbfs.h>
 #include <cbmem.h>
+#include <console/console.h>
 #include <rmodule.h>
 #include <stage_cache.h>
 #include <amdblocks/agesawrapper.h>
diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c
index 1027ae0..c55e734 100644
--- a/src/soc/amd/stoneyridge/BiosCallOuts.c
+++ b/src/soc/amd/stoneyridge/BiosCallOuts.c
@@ -18,15 +18,16 @@
 #include <device/device.h>
 #include <device/pci_def.h>
 #include <amdblocks/BiosCallOuts.h>
+#include <console/console.h>
 #include <soc/southbridge.h>
 #include <soc/pci_devs.h>
 #include <stdlib.h>
-
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/dimm_spd.h>
-#include "chip.h"
 #include <amdblocks/car.h>

+#include "chip.h"
+
 void __weak platform_FchParams_reset(FCH_RESET_DATA_BLOCK *FchParams_reset) {}

AGESA_STATUS agesa_fch_initreset(uint32_t Func, uintptr_t FchData,
diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c
index edd5c239..f43fcf3 100644
--- a/src/soc/amd/stoneyridge/ramtop.c
+++ b/src/soc/amd/stoneyridge/ramtop.c
@@ -17,6 +17,7 @@

#include <assert.h>
 #include <stdint.h>
+#include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/msr.h>
 #include <cpu/amd/mtrr.h>
diff --git a/src/soc/amd/stoneyridge/smbus_spd.c b/src/soc/amd/stoneyridge/smbus_spd.c
index 63b457c..ed73a6e 100644
--- a/src/soc/amd/stoneyridge/smbus_spd.c
+++ b/src/soc/amd/stoneyridge/smbus_spd.c
@@ -14,6 +14,7 @@
  */

#include <amdblocks/agesawrapper.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>
 #include <soc/southbridge.h>
diff --git a/src/soc/intel/apollolake/acpi.c b/src/soc/intel/apollolake/acpi.c
index 07cb2ad..9696a58 100644
--- a/src/soc/intel/apollolake/acpi.c
+++ b/src/soc/intel/apollolake/acpi.c
@@ -18,6 +18,7 @@

#include <arch/acpi.h>
 #include <arch/acpigen.h>
+#include <console/console.h>
 #include <device/mmio.h>
 #include <arch/smp/mpspec.h>
 #include <device/pci_ops.h>
@@ -34,6 +35,7 @@
 #include <soc/pci_devs.h>
 #include <soc/systemagent.h>
 #include <string.h>
+
 #include "chip.h"

#define CSTATE_RES(address_space, width, offset, address)		\
diff --git a/src/soc/intel/apollolake/uart.c b/src/soc/intel/apollolake/uart.c
index e8e2661..1a31e20 100644
--- a/src/soc/intel/apollolake/uart.c
+++ b/src/soc/intel/apollolake/uart.c
@@ -21,6 +21,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <intelblocks/uart.h>
 #include <soc/gpio.h>
 #include <soc/pci_devs.h>
diff --git a/src/soc/intel/cannonlake/uart.c b/src/soc/intel/cannonlake/uart.c
index 421cafc..1b72b24 100644
--- a/src/soc/intel/cannonlake/uart.c
+++ b/src/soc/intel/cannonlake/uart.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>
diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c
index c872e51..3a34c79 100644
--- a/src/soc/intel/common/block/acpi/acpi.c
+++ b/src/soc/intel/common/block/acpi/acpi.c
@@ -20,6 +20,7 @@
 #include <bootstate.h>
 #include <cbmem.h>
 #include <cf9_reset.h>
+#include <console/console.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/smm.h>
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index 342a120..0a59c56 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -15,6 +15,7 @@

#include <assert.h>
 #include <bootstate.h>
+#include <console/console.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c
index 0065a6c..47e2817 100644
--- a/src/soc/intel/common/block/gpio/gpio.c
+++ b/src/soc/intel/common/block/gpio/gpio.c
@@ -13,7 +13,9 @@
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  */
+
 #include <assert.h>
+#include <console/console.h>
 #include <intelblocks/gpio.h>
 #include <gpio.h>
 #include <intelblocks/itss.h>
diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c
index f3e91ff..e969a04 100644
--- a/src/soc/intel/denverton_ns/acpi.c
+++ b/src/soc/intel/denverton_ns/acpi.c
@@ -26,7 +26,7 @@
 #include <device/pci.h>
 #include <device/pci_ops.h>
 #include <cbmem.h>
-
+#include <console/console.h>
 #include <intelblocks/acpi.h>
 #include <soc/acpi.h>
 #include <soc/cpu.h>
diff --git a/src/soc/intel/denverton_ns/include/soc/hob_mem.h b/src/soc/intel/denverton_ns/include/soc/hob_mem.h
index d98295b..44d73fa 100644
--- a/src/soc/intel/denverton_ns/include/soc/hob_mem.h
+++ b/src/soc/intel/denverton_ns/include/soc/hob_mem.h
@@ -19,6 +19,7 @@
 #ifndef _DENVERTON_NS_HOB_MEM_H
 #define _DENVERTON_NS_HOB_MEM_H

+#include <console/console.h>
 #include <fsp/util.h>

void soc_display_fsp_smbios_memory_info_hob(
diff --git a/src/soc/intel/fsp_baytrail/i2c.c b/src/soc/intel/fsp_baytrail/i2c.c
index 68f5626..3ea91e3 100644
--- a/src/soc/intel/fsp_baytrail/i2c.c
+++ b/src/soc/intel/fsp_baytrail/i2c.c
@@ -15,6 +15,7 @@

#include <device/pci.h>
 #include <device/pci_ops.h>
+#include <console/console.h>
 #include <soc/baytrail.h>
 #include <soc/pci_devs.h>
 #include <soc/iosf.h>
diff --git a/src/soc/intel/icelake/uart.c b/src/soc/intel/icelake/uart.c
index 421cafc..1b72b24 100644
--- a/src/soc/intel/icelake/uart.c
+++ b/src/soc/intel/icelake/uart.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <device/pci_def.h>
 #include <intelblocks/gpio.h>
 #include <intelblocks/lpss.h>
diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c
index 83bed34..2cb5adf 100644
--- a/src/soc/intel/quark/acpi.c
+++ b/src/soc/intel/quark/acpi.c
@@ -15,6 +15,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <soc/acpi.h>
 #include <soc/ramstage.h>

diff --git a/src/soc/mediatek/common/spi.c b/src/soc/mediatek/common/spi.c
index 3e7186a..71ed95a 100644
--- a/src/soc/mediatek/common/spi.c
+++ b/src/soc/mediatek/common/spi.c
@@ -15,6 +15,7 @@

#include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <endian.h>
 #include <stdlib.h>
 #include <soc/pll.h>
diff --git a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
index 529ebde..01a32e3 100644
--- a/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
+++ b/src/soc/mediatek/mt8173/dramc_pi_calibration_api.c
@@ -15,6 +15,7 @@

#include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <stdlib.h>
 #include <soc/addressmap.h>
 #include <soc/dramc_common.h>
diff --git a/src/soc/mediatek/mt8173/i2c.c b/src/soc/mediatek/mt8173/i2c.c
index 2d99894..3395539 100644
--- a/src/soc/mediatek/mt8173/i2c.c
+++ b/src/soc/mediatek/mt8173/i2c.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <device/i2c_simple.h>
 #include <string.h>
diff --git a/src/soc/mediatek/mt8173/pmic_wrap.c b/src/soc/mediatek/mt8173/pmic_wrap.c
index 469653a..6acaee2 100644
--- a/src/soc/mediatek/mt8173/pmic_wrap.c
+++ b/src/soc/mediatek/mt8173/pmic_wrap.c
@@ -15,6 +15,7 @@

#include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <soc/infracfg.h>
 #include <soc/pmic_wrap.h>
diff --git a/src/soc/mediatek/mt8183/mt6358.c b/src/soc/mediatek/mt8183/mt6358.c
index 3dc9fe2..d338e16 100644
--- a/src/soc/mediatek/mt8183/mt6358.c
+++ b/src/soc/mediatek/mt8183/mt6358.c
@@ -14,6 +14,7 @@
  */

#include <assert.h>
+#include <console/console.h>
 #include <soc/pmic_wrap.h>
 #include <soc/mt6358.h>

diff --git a/src/soc/nvidia/tegra210/funitcfg.c b/src/soc/nvidia/tegra210/funitcfg.c
index a218862..887f9f0 100644
--- a/src/soc/nvidia/tegra210/funitcfg.c
+++ b/src/soc/nvidia/tegra210/funitcfg.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <soc/addressmap.h>
 #include <soc/clock.h>
 #include <soc/funitcfg.h>
diff --git a/src/soc/nvidia/tegra210/ramstage.c b/src/soc/nvidia/tegra210/ramstage.c
index 54f4204..13fa1c6 100644
--- a/src/soc/nvidia/tegra210/ramstage.c
+++ b/src/soc/nvidia/tegra210/ramstage.c
@@ -15,6 +15,7 @@

#include <arch/lib_helpers.h>
 #include <arch/stages.h>
+#include <console/console.h>
 #include <device/mmio.h>
 #include <gic.h>
 #include <soc/addressmap.h>
diff --git a/src/soc/rockchip/rk3288/crypto.c b/src/soc/rockchip/rk3288/crypto.c
index 90275ff..c429258 100644
--- a/src/soc/rockchip/rk3288/crypto.c
+++ b/src/soc/rockchip/rk3288/crypto.c
@@ -15,6 +15,7 @@

#include <device/mmio.h>
 #include <assert.h>
+#include <console/console.h>
 #include <delay.h>
 #include <soc/addressmap.h>
 #include <soc/soc.h>
diff --git a/src/southbridge/amd/agesa/hudson/resume.c b/src/southbridge/amd/agesa/hudson/resume.c
index 8a07565..efc35bd 100644
--- a/src/southbridge/amd/agesa/hudson/resume.c
+++ b/src/southbridge/amd/agesa/hudson/resume.c
@@ -18,7 +18,7 @@
 #include <device/device.h>
 #include "hudson.h"
 #include <AGESA.h>
-
+#include <console/console.h>
 #include <northbridge/amd/agesa/state_machine.h>

extern FCH_DATA_BLOCK InitEnvCfgDefault;
diff --git a/src/southbridge/amd/agesa/hudson/smbus_spd.c b/src/southbridge/amd/agesa/hudson/smbus_spd.c
index cb2fbe7..8eb36f4 100644
--- a/src/southbridge/amd/agesa/hudson/smbus_spd.c
+++ b/src/southbridge/amd/agesa/hudson/smbus_spd.c
@@ -15,12 +15,11 @@

#include <device/pci_def.h>
 #include <device/device.h>
-
+#include <console/console.h>
 /* warning: Porting.h includes an open #pragma pack(1) */
 #include <Porting.h>
 #include <AGESA.h>
 #include <amdlib.h>
-
 #include <northbridge/amd/agesa/dimmSpd.h>

/*-----------------------------------------------------------------------------
diff --git a/src/southbridge/amd/cimx/sb900/cfg.c b/src/southbridge/amd/cimx/sb900/cfg.c
index bc7e742..353d577 100644
--- a/src/southbridge/amd/cimx/sb900/cfg.c
+++ b/src/southbridge/amd/cimx/sb900/cfg.c
@@ -13,12 +13,12 @@
  * GNU General Public License for more details.
  */

-
+#include <console/console.h>
 #include <string.h>
+
 #include "SbPlatform.h"
 #include "platform_cfg.h"

-
 /**
  * @brief South Bridge CIMx configuration
  *
diff --git a/src/southbridge/amd/pi/hudson/smbus_spd.c b/src/southbridge/amd/pi/hudson/smbus_spd.c
index 8d67b1e..c49ccff 100644
--- a/src/southbridge/amd/pi/hudson/smbus_spd.c
+++ b/src/southbridge/amd/pi/hudson/smbus_spd.c
@@ -13,6 +13,7 @@
  * GNU General Public License for more details.
  */

+#include <console/console.h>
 #include <device/pci_def.h>
 #include <device/device.h>

@@ -20,7 +21,6 @@
 #include <Porting.h>
 #include <AGESA.h>
 #include <amdlib.h>
-
 #include <northbridge/amd/pi/dimmSpd.h>

/*-----------------------------------------------------------------------------
diff --git a/src/southbridge/broadcom/bcm5785/early_smbus.c b/src/southbridge/broadcom/bcm5785/early_smbus.c
index bcbfb12..5aa6ee2 100644
--- a/src/southbridge/broadcom/bcm5785/early_smbus.c
+++ b/src/southbridge/broadcom/bcm5785/early_smbus.c
@@ -15,7 +15,9 @@
  */

#include <arch/io.h>
+#include <console/console.h>
 #include <device/pci_ops.h>
+
 #include "smbus.h"

#define SMBUS_IO_BASE 0x1000