Change in coreboot[master]: sb/amd/agesa/hudson: Use common FCH HDA setup code

[Paul Menzel (Code Review)]

Paul Menzel has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46639 )

Change subject: sb/amd/agesa/hudson: Use common FCH HDA setup code
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sb/amd/agesa/hudson: Use common FCH HDA setup code

Let’s configure Azalia ourselves instead of AGESA, and use the common
AMD code, where `hda.c` is basically the same. The FCH hasn’t changed in
this regard, so the code can be easily used.

Note, the board change, will be split out. For whatever reason, the ACPI
device AZHD is not created (at least I do not see it in the disassembled
SSDT).

Change-Id: I368947e578a8c4c97af190103ffb42adb1f8d4e6
Signed-off-by: Paul Menzel 
---
M src/mainboard/asus/f2a85-m/Kconfig
A src/mainboard/asus/f2a85-m/hda_verb.c
M src/southbridge/amd/agesa/hudson/Kconfig
M src/southbridge/amd/agesa/hudson/Makefile.inc
D src/southbridge/amd/agesa/hudson/hda.c
5 files changed, 35 insertions(+), 26 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/46639/1

diff --git a/src/mainboard/asus/f2a85-m/Kconfig b/src/mainboard/asus/f2a85-m/Kconfig
index 27d5517..7d475c2 100644
--- a/src/mainboard/asus/f2a85-m/Kconfig
+++ b/src/mainboard/asus/f2a85-m/Kconfig
@@ -17,6 +17,7 @@
    select SUPERIO_NUVOTON_COMMON_COM_A if BOARD_ASUS_F2A85_M_PRO
    select BOARD_ROMSIZE_KB_8192
    select GFXUMA
+	select AZALIA_PLUGIN_SUPPORT

choice
    prompt "DDR3 memory voltage"
diff --git a/src/mainboard/asus/f2a85-m/hda_verb.c b/src/mainboard/asus/f2a85-m/hda_verb.c
new file mode 100644
index 0000000..0fec04e
--- /dev/null
+++ b/src/mainboard/asus/f2a85-m/hda_verb.c
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+	/* Realtek ALC701 on mainboard */
+	0x10ec0892,
+
+	AZALIA_SUBVENDOR(0, 0x10438444), // HDA Codec Subsystem ID: Subsystem:
+				// ASUSTeK Computer Inc. FCH Azalia Controller
+
+	AZALIA_RESET(1), // Widget node 0x01 :
+	AZALIA_PIN_CFG(0, 0x11, 0x99430140),
+	AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x14, 0x01014010),
+	AZALIA_PIN_CFG(0, 0x15, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x16, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x17, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x18, 0x01a19850),
+	AZALIA_PIN_CFG(0, 0x19, 0x02a19c60),
+	AZALIA_PIN_CFG(0, 0x1a, 0x0181305f),
+	AZALIA_PIN_CFG(0, 0x1b, 0x02214c20),
+	AZALIA_PIN_CFG(0, 0x1c, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0x1d, 0x4004c601),
+	AZALIA_PIN_CFG(0, 0x1e, 0x01456130),
+	AZALIA_PIN_CFG(0, 0x1f, 0x411111f0),
+	AZALIA_PIN_CFG(0, 0xff, 0xffffffff)
+};
+
+const u32 pc_beep_verbs[] = {
+};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/southbridge/amd/agesa/hudson/Kconfig b/src/southbridge/amd/agesa/hudson/Kconfig
index e61bc85..24ddc26 100644
--- a/src/southbridge/amd/agesa/hudson/Kconfig
+++ b/src/southbridge/amd/agesa/hudson/Kconfig
@@ -17,6 +17,7 @@
    select SOC_AMD_COMMON
    select SOC_AMD_COMMON_BLOCK
    select SOC_AMD_COMMON_BLOCK_ACPIMMIO
+	select SOC_AMD_COMMON_BLOCK_HDA

config EHCI_BAR
    hex
diff --git a/src/southbridge/amd/agesa/hudson/Makefile.inc b/src/southbridge/amd/agesa/hudson/Makefile.inc
index b8eb5b9..de9afba 100644
--- a/src/southbridge/amd/agesa/hudson/Makefile.inc
+++ b/src/southbridge/amd/agesa/hudson/Makefile.inc
@@ -9,7 +9,6 @@
 ramstage-y += sm.c
 ramstage-y += ide.c
 ramstage-y += sata.c
-ramstage-y += hda.c
 ramstage-y += pci.c
 ramstage-y += pcie.c
 ramstage-y += sd.c
diff --git a/src/southbridge/amd/agesa/hudson/hda.c b/src/southbridge/amd/agesa/hudson/hda.c
deleted file mode 100644
index a15b045..0000000
--- a/src/southbridge/amd/agesa/hudson/hda.c
+++ /dev/null
@@ -1,25 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <device/device.h>
-#include <device/pci.h>
-#include <device/pci_ids.h>
-
-#include "hudson.h"
-
-static void hda_init(struct device *dev)
-{
-}
-
-static struct device_operations hda_audio_ops = {
-	.read_resources = pci_dev_read_resources,
-	.set_resources = pci_dev_set_resources,
-	.enable_resources = pci_dev_enable_resources,
-	.init = hda_init,
-	.ops_pci = &pci_dev_ops_pci,
-};
-
-static const struct pci_driver hdaaudio_driver __pci_driver = {
-	.ops = &hda_audio_ops,
-	.vendor = PCI_VENDOR_ID_AMD,
-	.device = PCI_DEVICE_ID_AMD_SB900_HDA,
-};

[M] Change in coreboot[master]: sb/amd/agesa/hudson: Use common FCH HDA setup code

[Martin L Roth (Code Review)]

Martin L Roth has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/46639?usp=email )

Change subject: sb/amd/agesa/hudson: Use common FCH HDA setup code
......................................................................

Abandoned

This patch has not been touched in over 12 months. Anyone who wants to take over work on this patch, please feel free to restore it and do any work needed to get it merged. If you create a new patch based on this work, please credit the original author.