HAOUAS Elyes (ehaouas@noos.fr) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/16723
-gerrit
commit 89a0a6d1f095335795c46bd0f05b9f830b263fb1 Author: Elyes HAOUAS ehaouas@noos.fr Date: Thu Sep 22 21:20:54 2016 +0200
src/mainboard/../../mptable.c: Use tabs for indents
Change-Id: I341293cd334d6d465636db7e81400230d61bc693 Signed-off-by: Elyes HAOUAS ehaouas@noos.fr --- src/mainboard/amd/bettong/mptable.c | 2 +- src/mainboard/amd/db-ft3b-lc/mptable.c | 2 +- src/mainboard/amd/olivehill/mptable.c | 2 +- src/mainboard/amd/olivehillplus/mptable.c | 2 +- src/mainboard/amd/parmer/mptable.c | 2 +- src/mainboard/amd/serengeti_cheetah/mptable.c | 180 +++++++++++++------------- src/mainboard/amd/south_station/mptable.c | 2 +- src/mainboard/amd/thatcher/mptable.c | 2 +- src/mainboard/amd/torpedo/mptable.c | 2 +- src/mainboard/amd/union_station/mptable.c | 2 +- src/mainboard/apple/macbook21/mptable.c | 6 +- src/mainboard/asrock/e350m1/mptable.c | 2 +- src/mainboard/asrock/imb-a180/mptable.c | 2 +- src/mainboard/asus/f2a85-m/mptable.c | 2 +- src/mainboard/bap/ode_e21XX/mptable.c | 2 +- src/mainboard/broadcom/blast/mptable.c | 96 +++++++------- src/mainboard/getac/p470/mptable.c | 6 +- src/mainboard/gigabyte/ga_2761gxdk/mptable.c | 46 +++---- src/mainboard/gigabyte/m57sli/mptable.c | 54 ++++---- src/mainboard/hp/abm/mptable.c | 2 +- src/mainboard/hp/pavilion_m6_1035dx/mptable.c | 2 +- src/mainboard/ibase/mb899/mptable.c | 6 +- src/mainboard/intel/d945gclf/mptable.c | 6 +- src/mainboard/intel/eagleheights/mptable.c | 6 +- src/mainboard/kontron/986lcd-m/mptable.c | 6 +- src/mainboard/lenovo/g505s/mptable.c | 2 +- src/mainboard/lenovo/t60/mptable.c | 6 +- src/mainboard/lenovo/x60/mptable.c | 6 +- src/mainboard/msi/ms9185/mptable.c | 106 +++++++-------- src/mainboard/roda/rk886ex/mptable.c | 6 +- src/mainboard/siemens/sitemp_g1p1/mptable.c | 2 +- src/mainboard/sunw/ultra40/mptable.c | 110 ++++++++-------- src/mainboard/supermicro/h8dme/mptable.c | 50 +++---- src/mainboard/supermicro/h8dmr/mptable.c | 50 +++---- 34 files changed, 390 insertions(+), 390 deletions(-)
diff --git a/src/mainboard/amd/bettong/mptable.c b/src/mainboard/amd/bettong/mptable.c index 1c74ae5..744fd98 100644 --- a/src/mainboard/amd/bettong/mptable.c +++ b/src/mainboard/amd/bettong/mptable.c @@ -84,7 +84,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data_ptr[0x02]); diff --git a/src/mainboard/amd/db-ft3b-lc/mptable.c b/src/mainboard/amd/db-ft3b-lc/mptable.c index 0c668df..dac3897 100644 --- a/src/mainboard/amd/db-ft3b-lc/mptable.c +++ b/src/mainboard/amd/db-ft3b-lc/mptable.c @@ -75,7 +75,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* APU Internal Graphic Device */ PCI_INT(0x0, 0x01, 0x0, intr_data_ptr[PIRQ_C]); diff --git a/src/mainboard/amd/olivehill/mptable.c b/src/mainboard/amd/olivehill/mptable.c index 50d1aa3..9ae75ae 100644 --- a/src/mainboard/amd/olivehill/mptable.c +++ b/src/mainboard/amd/olivehill/mptable.c @@ -150,7 +150,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/olivehillplus/mptable.c b/src/mainboard/amd/olivehillplus/mptable.c index a2ba7f4..925526c 100644 --- a/src/mainboard/amd/olivehillplus/mptable.c +++ b/src/mainboard/amd/olivehillplus/mptable.c @@ -111,7 +111,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/parmer/mptable.c b/src/mainboard/amd/parmer/mptable.c index 8f226d5..e10fc89 100644 --- a/src/mainboard/amd/parmer/mptable.c +++ b/src/mainboard/amd/parmer/mptable.c @@ -111,7 +111,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/serengeti_cheetah/mptable.c b/src/mainboard/amd/serengeti_cheetah/mptable.c index acc4a6c..2ffe4c9 100644 --- a/src/mainboard/amd/serengeti_cheetah/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah/mptable.c @@ -25,15 +25,15 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int i, j, bus_isa; struct mb_sysconf_t *m;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf();
@@ -43,54 +43,54 @@ static void *smp_write_config_table(void *v)
/*I/O APICs: APIC ID Version State Address*/ smp_write_ioapic(mc, m->apicid_8111, 0x11, VIO_APIC_VADDR); //8111 - { - device_t dev; + { + device_t dev; struct resource *res; - dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1)); - if (dev) { + dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3, 1)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, m->apicid_8132_1, 0x11, res2mmio(res, 0, 0)); } - } - dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); - if (dev) { + } + dev = dev_find_slot(m->bus_8132_0, PCI_DEVFN(m->sbdn3+1, 1)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, m->apicid_8132_2, 0x11, res2mmio(res, 0, 0)); } - } + }
- j = 0; + j = 0;
- for(i = 1; i< sysconf.hc_possible_num; i++) { - if(!(sysconf.pci1234[i] & 0x1) ) continue; + for(i = 1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue;
- switch(sysconf.hcid[i]) { - case 1: // 8132 + switch(sysconf.hcid[i]) { + case 1: // 8132 case 3: // 8131 - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + smp_write_ioapic(mc, m->apicid_8132a[j][0], 0x11, res2mmio(res, 0, 0)); - } - } - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, + } + } + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + smp_write_ioapic(mc, m->apicid_8132a[j][1], 0x11, res2mmio(res, 0, 0)); - } - } - break; - } - j++; - } + } + } + break; + } + j++; + }
}
@@ -98,76 +98,76 @@ static void *smp_write_config_table(void *v)
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ //??? What - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_0, ((sysconf.sbdn+1)<<2)|3, m->apicid_8111, 0x13);
// Onboard AMD USB - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (0 << 2)|3, m->apicid_8111, 0x13);
//Slot 3 PCI 32 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16 - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (5 << 2)|i, m->apicid_8111, 0x10 + (1+i)%4); //16 + }
//Slot 4 PCI 32 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); //16 - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8111_1, (4 << 2)|i, m->apicid_8111, 0x10 + (0+i)%4); //16 + }
//Slot 1 PCI-X 133/100/66 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_2, (1 << 2)|i, m->apicid_8132_2, (0+i)%4); // + }
//Slot 2 PCI-X 133/100/66 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); //25 - } - - j = 0; - - for(i = 1; i< sysconf.hc_possible_num; i++) { - if(!(sysconf.pci1234[i] & 0x1) ) continue; - int ii; - device_t dev; - struct resource *res; - switch(sysconf.hcid[i]) { - case 1: + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132_1, (1 << 2)|i, m->apicid_8132_1, (1+i)%4); //25 + } + + j = 0; + + for(i = 1; i< sysconf.hc_possible_num; i++) { + if(!(sysconf.pci1234[i] & 0x1) ) continue; + int ii; + device_t dev; + struct resource *res; + switch(sysconf.hcid[i]) { + case 1: case 3: - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - //Slot 1 PCI-X 133/100/66 - for(ii = 0; ii < 4; ii++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0 << 2)|ii, m->apicid_8132a[j][0], (0+ii)%4); // - } - } - } - - dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - //Slot 2 PCI-X 133/100/66 - for(ii = 0; ii < 4; ii++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0 << 2)|ii, m->apicid_8132a[j][1], (0+ii)%4); //25 - } - } - } - - break; - case 2: - - // Slot AGP - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11); - break; - } - - j++; - } + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + //Slot 1 PCI-X 133/100/66 + for(ii = 0; ii < 4; ii++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][1], (0 << 2)|ii, m->apicid_8132a[j][0], (0+ii)%4); // + } + } + } + + dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j]+1, 1)); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + //Slot 2 PCI-X 133/100/66 + for(ii = 0; ii < 4; ii++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8132a[j][2], (0 << 2)|ii, m->apicid_8132a[j][1], (0+ii)%4); //25 + } + } + } + + break; + case 2: + + // Slot AGP + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_8151[j][1], 0x0, m->apicid_8111, 0x11); + break; + } + + j++; + }
diff --git a/src/mainboard/amd/south_station/mptable.c b/src/mainboard/amd/south_station/mptable.c index 19a9f35..71ad311 100644 --- a/src/mainboard/amd/south_station/mptable.c +++ b/src/mainboard/amd/south_station/mptable.c @@ -77,7 +77,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
/* APU Internal Graphic Device*/ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/thatcher/mptable.c b/src/mainboard/amd/thatcher/mptable.c index 797f679..2640284 100644 --- a/src/mainboard/amd/thatcher/mptable.c +++ b/src/mainboard/amd/thatcher/mptable.c @@ -111,7 +111,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/torpedo/mptable.c b/src/mainboard/amd/torpedo/mptable.c index c5c908d..ebe14c8 100644 --- a/src/mainboard/amd/torpedo/mptable.c +++ b/src/mainboard/amd/torpedo/mptable.c @@ -153,7 +153,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb900, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), apicid_sb900, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/amd/union_station/mptable.c b/src/mainboard/amd/union_station/mptable.c index 7f8eba6..7b6c018 100644 --- a/src/mainboard/amd/union_station/mptable.c +++ b/src/mainboard/amd/union_station/mptable.c @@ -77,7 +77,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
/* APU Internal Graphic Device*/ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/apple/macbook21/mptable.c b/src/mainboard/apple/macbook21/mptable.c index e54d376..9bf168a 100644 --- a/src/mainboard/apple/macbook21/mptable.c +++ b/src/mainboard/apple/macbook21/mptable.c @@ -24,14 +24,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/asrock/e350m1/mptable.c b/src/mainboard/asrock/e350m1/mptable.c index 1588964..47a72e6 100644 --- a/src/mainboard/asrock/e350m1/mptable.c +++ b/src/mainboard/asrock/e350m1/mptable.c @@ -78,7 +78,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(fn)), ioapic_id, (pin))
/* APU Internal Graphic Device*/ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/asrock/imb-a180/mptable.c b/src/mainboard/asrock/imb-a180/mptable.c index 2fc380f..6241282 100644 --- a/src/mainboard/asrock/imb-a180/mptable.c +++ b/src/mainboard/asrock/imb-a180/mptable.c @@ -151,7 +151,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/asus/f2a85-m/mptable.c b/src/mainboard/asus/f2a85-m/mptable.c index 4f00dad..09d9455 100644 --- a/src/mainboard/asus/f2a85-m/mptable.c +++ b/src/mainboard/asus/f2a85-m/mptable.c @@ -111,7 +111,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* IOMMU */ PCI_INT(0x0, 0x0, 0x0, 0x10); diff --git a/src/mainboard/bap/ode_e21XX/mptable.c b/src/mainboard/bap/ode_e21XX/mptable.c index a2ba7f4..925526c 100644 --- a/src/mainboard/bap/ode_e21XX/mptable.c +++ b/src/mainboard/bap/ode_e21XX/mptable.c @@ -111,7 +111,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/broadcom/blast/mptable.c b/src/mainboard/broadcom/blast/mptable.c index 2ecc6af..8041ba1 100644 --- a/src/mainboard/broadcom/blast/mptable.c +++ b/src/mainboard/broadcom/blast/mptable.c @@ -19,33 +19,33 @@ extern unsigned sbdn2;
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int i, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf();
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev = 0; + { + device_t dev = 0; struct resource *res; for(i = 0; i < 3; i++) { dev = dev_find_device(0x1166, 0x0235, dev); - if (dev) { + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, apicid_bcm5785[i], 0x11, res2mmio(res, 0, 0)); } - } + } }
} @@ -59,77 +59,77 @@ static void *smp_write_config_table(void *v)
//SATA outb(0x07, 0xc00); outb(0x0f, 0xc01); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e << 2)|0, apicid_bcm5785[0], 0xf); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1, (0x0e << 2)|0, apicid_bcm5785[0], 0xf);
//USB outb(0x01, 0xc00); outb(0x0a, 0xc01); - for(i = 0; i < 3; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); // - } + for(i = 0; i < 3; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, apicid_bcm5785[0], 0xa); // + }
- /* enable int */ - /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ - { - device_t dev; - dev = dev_find_device(0x1166, 0x0205, 0); - if(dev) { - uint32_t dword; - dword = pci_read_config32(dev, 0x6c); - dword |= (1 << 4); // enable interrupts - pci_write_config32(dev, 0x6c, dword); + /* enable int */ + /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ + { + device_t dev; + dev = dev_find_device(0x1166, 0x0205, 0); + if(dev) { + uint32_t dword; + dword = pci_read_config32(dev, 0x6c); + dword |= (1 << 4); // enable interrupts + pci_write_config32(dev, 0x6c, dword);
- } + }
- } + }
//First pci-x slot (on bcm5785) under bus_bcm5785_1:d.0 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1_1, (4 << 2)|i, apicid_bcm5785[1], 2 + (0+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_1_1, (4 << 2)|i, apicid_bcm5785[1], 2 + (0+i)%4); // + }
//pci slot (on bcm5785) - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4 << 2)|i, apicid_bcm5785[1], i%2); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (4 << 2)|i, apicid_bcm5785[1], i%2); // + }
//onboard ati - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5 << 2)|0, apicid_bcm5785[1], 0x1); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5785_0, (5 << 2)|0, apicid_bcm5785[1], 0x1);
//PCI-X on bcm5780 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[1], (4 << 2)|i, apicid_bcm5785[1], 6 + (0+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[1], (4 << 2)|i, apicid_bcm5785[1], 6 + (0+i)%4); // + }
- for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[1], (5 << 2)|i, apicid_bcm5785[1], 6 + (1+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[1], (5 << 2)|i, apicid_bcm5785[1], 6 + (1+i)%4); // + }
//onboard Broadcom - for(i = 0; i < 2; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[2], (4 << 2)|i, apicid_bcm5785[1], 0xa + (0+i)%4); // - } + for(i = 0; i < 2; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[2], (4 << 2)|i, apicid_bcm5785[1], 0xa + (0+i)%4); // + }
// First PCI-E x8 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[5], (0 << 2)|i, apicid_bcm5785[1], 0xe); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[5], (0 << 2)|i, apicid_bcm5785[1], 0xe); // + }
// Second PCI-E x8 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0 << 2)|i, apicid_bcm5785[1], 0xc); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[3], (0 << 2)|i, apicid_bcm5785[1], 0xc); // + }
// Third PCI-E x1 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[4], (0 << 2)|i, apicid_bcm5785[1], 0xd); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_bcm5780[4], (0 << 2)|i, apicid_bcm5785[1], 0xd); // + }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ mptable_lintsrc(mc, bus_isa); diff --git a/src/mainboard/getac/p470/mptable.c b/src/mainboard/getac/p470/mptable.c index 8e792b7..a9e8a26 100644 --- a/src/mainboard/getac/p470/mptable.c +++ b/src/mainboard/getac/p470/mptable.c @@ -24,14 +24,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c index a7962f54..e15f744 100644 --- a/src/mainboard/gigabyte/ga_2761gxdk/mptable.c +++ b/src/mainboard/gigabyte/ga_2761gxdk/mptable.c @@ -30,15 +30,15 @@ extern unsigned apicid_sis966;
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; unsigned sbdn; int i, j, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf(); sbdn = sysconf.sbdn; @@ -46,13 +46,13 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev; + { + device_t dev; struct resource *res; uint32_t dword;
- dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn+ 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_sis966[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_sis966, 0x11, @@ -62,13 +62,13 @@ static void *smp_write_config_table(void *v) dword = 0x43c6c643; pci_write_config32(dev, 0x7c, dword);
- dword = 0x81001a00; - pci_write_config32(dev, 0x80, dword); + dword = 0x81001a00; + pci_write_config32(dev, 0x80, dword);
dword = 0xd0001202; - pci_write_config32(dev, 0x84, dword); + pci_write_config32(dev, 0x84, dword);
- } + } }
mptable_add_isa_interrupts(mc, bus_isa, apicid_sis966, 0); @@ -77,27 +77,27 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, fn, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_sis966[bus], (((dev)<<2)|(fn)), apicid_sis966, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_sis966[bus], (((dev)<<2)|(fn)), apicid_sis966, (pin))
- PCI_INT(0, sbdn+1, 1, 0xa); - PCI_INT(0, sbdn+2, 0, 0x16); // 22 - PCI_INT(0, sbdn+2, 1, 0x17); // 23 - PCI_INT(0, sbdn+6, 1, 0x17); // 23 - PCI_INT(0, sbdn+5, 0, 0x14); // 20 - PCI_INT(0, sbdn+5, 1, 0x17); // 23 - PCI_INT(0, sbdn+5, 2, 0x15); // 21 - PCI_INT(0, sbdn+8, 0, 0x16); // 22 + PCI_INT(0, sbdn+1, 1, 0xa); + PCI_INT(0, sbdn+2, 0, 0x16); // 22 + PCI_INT(0, sbdn+2, 1, 0x17); // 23 + PCI_INT(0, sbdn+6, 1, 0x17); // 23 + PCI_INT(0, sbdn+5, 0, 0x14); // 20 + PCI_INT(0, sbdn+5, 1, 0x17); // 23 + PCI_INT(0, sbdn+5, 2, 0x15); // 21 + PCI_INT(0, sbdn+8, 0, 0x16); // 22
for(j = 7; j >= 2; j--) { if(!bus_sis966[j]) continue; for(i = 0; i < 4; i++) { - PCI_INT(j, 0x00, i, 0x10 + (2+j+i+4-sbdn%4)%4); - } + PCI_INT(j, 0x00, i, 0x10 + (2+j+i+4-sbdn%4)%4); + } }
for(j = 0; j < 2; j++) for(i = 0; i < 4; i++) { - PCI_INT(1, 0x06+j, i, 0x10 + (2+i+j)%4); + PCI_INT(1, 0x06+j, i, 0x10 + (2+i+j)%4); }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ diff --git a/src/mainboard/gigabyte/m57sli/mptable.c b/src/mainboard/gigabyte/m57sli/mptable.c index 403b969..a212849 100644 --- a/src/mainboard/gigabyte/m57sli/mptable.c +++ b/src/mainboard/gigabyte/m57sli/mptable.c @@ -29,15 +29,15 @@ extern unsigned apicid_mcp55;
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; unsigned sbdn; int i, j, k, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf(); sbdn = sysconf.sbdn; @@ -45,12 +45,12 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev; + { + device_t dev; struct resource *res;
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_mcp55, 0x11, @@ -58,9 +58,9 @@ static void *smp_write_config_table(void *v) } /* set up the interrupt registers of mcp55 */ pci_write_config32(dev, 0x7c, 0xc643c643); - pci_write_config32(dev, 0x80, 0x8da01009); - pci_write_config32(dev, 0x84, 0x200018d2); - } + pci_write_config32(dev, 0x80, 0x8da01009); + pci_write_config32(dev, 0x84, 0x200018d2); + } }
mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0); @@ -83,28 +83,28 @@ static void *smp_write_config_table(void *v) PCI_INT(0,sbdn+8,0, 20); /* GBit Ethernet */
/* The PCIe slots, each on its own bus */ - k = 1; - for(i = 0; i < 4; i++){ - for(j = 7; j > 1; j--){ - if(k > 3) k = 0; - PCI_INT(j,0,i, 16+k); - k++; - } - k--; - } + k = 1; + for(i = 0; i < 4; i++){ + for(j = 7; j > 1; j--){ + if(k > 3) k = 0; + PCI_INT(j,0,i, 16+k); + k++; + } + k--; + }
/* On bus 1: the PCI bus slots... physical PCI slots are j = 7,8 FireWire is j = 10 */ - k = 2; - for(i = 0; i < 4; i++){ - for(j = 6; j < 11; j++){ - if(k > 3) k = 0; - PCI_INT(1,j,i, 16+k); - k++; - } - } + k = 2; + for(i = 0; i < 4; i++){ + for(j = 6; j < 11; j++){ + if(k > 3) k = 0; + PCI_INT(1,j,i, 16+k); + k++; + } + }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ mptable_lintsrc(mc, bus_isa); diff --git a/src/mainboard/hp/abm/mptable.c b/src/mainboard/hp/abm/mptable.c index 2fc380f..6241282 100644 --- a/src/mainboard/hp/abm/mptable.c +++ b/src/mainboard/hp/abm/mptable.c @@ -151,7 +151,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* Internal VGA */ PCI_INT(0x0, 0x01, 0x0, intr_data[0x02]); diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c index f1cc663..9e63caf 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/mptable.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/mptable.c @@ -112,7 +112,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* IOMMU */ PCI_INT(0x0, 0x00, 0x0, 0x10); diff --git a/src/mainboard/ibase/mb899/mptable.c b/src/mainboard/ibase/mb899/mptable.c index bbdf0bf..89fba6b 100644 --- a/src/mainboard/ibase/mb899/mptable.c +++ b/src/mainboard/ibase/mb899/mptable.c @@ -23,16 +23,16 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; struct device *riser = NULL, *firewire = NULL; int firewire_bus = 0, riser_bus = 0, isa_bus; int ioapic_id;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
firewire = dev_find_device(0x104c, 0x8023, 0); if (firewire) { diff --git a/src/mainboard/intel/d945gclf/mptable.c b/src/mainboard/intel/d945gclf/mptable.c index 593c098..342f1e6 100644 --- a/src/mainboard/intel/d945gclf/mptable.c +++ b/src/mainboard/intel/d945gclf/mptable.c @@ -23,14 +23,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/intel/eagleheights/mptable.c b/src/mainboard/intel/eagleheights/mptable.c index ae05bb9..a5fc89d 100644 --- a/src/mainboard/intel/eagleheights/mptable.c +++ b/src/mainboard/intel/eagleheights/mptable.c @@ -55,7 +55,7 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; unsigned char bus_chipset, bus_pci; unsigned char bus_pcie_a, bus_pcie_a1, bus_pcie_b; int bus_isa, i; @@ -71,11 +71,11 @@ static void *smp_write_config_table(void *v) } rcba = res2mmio(res, 0, 0);
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
/* Get bus numbers */ bus_chipset = 0; diff --git a/src/mainboard/kontron/986lcd-m/mptable.c b/src/mainboard/kontron/986lcd-m/mptable.c index 858a7ef..2ee2890 100644 --- a/src/mainboard/kontron/986lcd-m/mptable.c +++ b/src/mainboard/kontron/986lcd-m/mptable.c @@ -23,16 +23,16 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; struct device *riser = NULL, *firewire = NULL; int firewire_bus = 0, riser_bus = 0, isa_bus; int ioapic_id;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
firewire = dev_find_device(0x104c, 0x8023, 0); if (firewire) { diff --git a/src/mainboard/lenovo/g505s/mptable.c b/src/mainboard/lenovo/g505s/mptable.c index f1cc663..9e63caf 100644 --- a/src/mainboard/lenovo/g505s/mptable.c +++ b/src/mainboard/lenovo/g505s/mptable.c @@ -112,7 +112,7 @@ static void *smp_write_config_table(void *v) * associated with a specific bus/device/function tuple. */ #define PCI_INT(bus, dev, int_sign, pin) \ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin)) + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, (bus), (((dev)<<2)|(int_sign)), ioapic_id, (pin))
/* IOMMU */ PCI_INT(0x0, 0x00, 0x0, 0x10); diff --git a/src/mainboard/lenovo/t60/mptable.c b/src/mainboard/lenovo/t60/mptable.c index ebdafda..d798d8d 100644 --- a/src/mainboard/lenovo/t60/mptable.c +++ b/src/mainboard/lenovo/t60/mptable.c @@ -24,14 +24,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/lenovo/x60/mptable.c b/src/mainboard/lenovo/x60/mptable.c index 5e3de67..a800742 100644 --- a/src/mainboard/lenovo/x60/mptable.c +++ b/src/mainboard/lenovo/x60/mptable.c @@ -24,14 +24,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/msi/ms9185/mptable.c b/src/mainboard/msi/ms9185/mptable.c index fccb200..55ab5b3 100644 --- a/src/mainboard/msi/ms9185/mptable.c +++ b/src/mainboard/msi/ms9185/mptable.c @@ -34,16 +34,16 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc;
int i, bus_isa; struct mb_sysconf_t *m;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf(); m = sysconf.mb; @@ -51,19 +51,19 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { + { device_t dev = 0; - struct resource *res; - for(i = 0; i < 3; i++) { - dev = dev_find_device(0x1166, 0x0235, dev); - if (dev) { - res = find_resource(dev, PCI_BASE_ADDRESS_0); - if (res) { - smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, - res2mmio(res, 0, 0)); - } - } - } + struct resource *res; + for(i = 0; i < 3; i++) { + dev = dev_find_device(0x1166, 0x0235, dev); + if (dev) { + res = find_resource(dev, PCI_BASE_ADDRESS_0); + if (res) { + smp_write_ioapic(mc, m->apicid_bcm5785[i], 0x11, + res2mmio(res, 0, 0)); + } + } + }
}
@@ -76,71 +76,71 @@ static void *smp_write_config_table(void *v)
//SATA outb(0x07, 0xc00); outb(0x0f, 0xc01); - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e << 2)|0, m->apicid_bcm5785[0], 0xf); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1, (0x0e << 2)|0, m->apicid_bcm5785[0], 0xf);
//USB outb(0x01, 0xc00); outb(0x0a, 0xc01); - for(i = 0; i < 3; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, m->apicid_bcm5785[0], 0xa); // - } + for(i = 0; i < 3; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, ((2+sysconf.sbdn)<<2)|i, m->apicid_bcm5785[0], 0xa); // + }
- /* enable int */ - /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ - { - device_t dev; - dev = dev_find_device(0x1166, 0x0205, 0); - if(dev) { - uint32_t dword; - dword = pci_read_config32(dev, 0x6c); - dword |= (1 << 4); // enable interrupts - pci_write_config32(dev, 0x6c, dword); - } - } + /* enable int */ + /* why here? must get the BAR and PCI command bit 1 set before enable it ....*/ + { + device_t dev; + dev = dev_find_device(0x1166, 0x0205, 0); + if(dev) { + uint32_t dword; + dword = pci_read_config32(dev, 0x6c); + dword |= (1 << 4); // enable interrupts + pci_write_config32(dev, 0x6c, dword); + } + }
//First pci-x slot (on bcm5785) under bus_bcm5785_1:d.0 // AIC 8130 Galileo Technology... - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (6 << 2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_1_1, (6 << 2)|i, m->apicid_bcm5785[1], 2 + (1+i)%4); // + }
//pci slot (on bcm5785) - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (5 << 2)|i, m->apicid_bcm5785[1], 8+i%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (5 << 2)|i, m->apicid_bcm5785[1], 8+i%4); // + }
//onboard ati - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (4 << 2)|0, m->apicid_bcm5785[1], 0x1); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5785_0, (4 << 2)|0, m->apicid_bcm5785[1], 0x1);
//PCI-X on bcm5780 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[1], (4 << 2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[1], (4 << 2)|i, m->apicid_bcm5785[1], 2 + (0+i)%4); // + }
//onboard Broadcom - for(i = 0; i < 2; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[2], (4 << 2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); // - } + for(i = 0; i < 2; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[2], (4 << 2)|i, m->apicid_bcm5785[1], 0xa + (0+i)%4); // + }
// First PCI-E x8 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0 << 2)|i, m->apicid_bcm5785[1], 0xe); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[5], (0 << 2)|i, m->apicid_bcm5785[1], 0xe); // + }
// Second PCI-E x8 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[3], (0 << 2)|i, m->apicid_bcm5785[1], 0xc); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[3], (0 << 2)|i, m->apicid_bcm5785[1], 0xc); // + }
// Third PCI-E x1 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[4], (0 << 2)|i, m->apicid_bcm5785[1], 0xd); // - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, m->bus_bcm5780[4], (0 << 2)|i, m->apicid_bcm5785[1], 0xd); // + }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ mptable_lintsrc(mc, bus_isa); diff --git a/src/mainboard/roda/rk886ex/mptable.c b/src/mainboard/roda/rk886ex/mptable.c index 8e792b7..a9e8a26 100644 --- a/src/mainboard/roda/rk886ex/mptable.c +++ b/src/mainboard/roda/rk886ex/mptable.c @@ -24,14 +24,14 @@
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
mptable_write_buses(mc, NULL, &isa_bus);
diff --git a/src/mainboard/siemens/sitemp_g1p1/mptable.c b/src/mainboard/siemens/sitemp_g1p1/mptable.c index 1ae48f3..832a79e 100644 --- a/src/mainboard/siemens/sitemp_g1p1/mptable.c +++ b/src/mainboard/siemens/sitemp_g1p1/mptable.c @@ -35,7 +35,7 @@ static void *smp_write_config_table(void *v) struct mp_config_table *mc; int isa_bus;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); mptable_init(mc, LOCAL_APIC_ADDR); smp_write_processors(mc);
diff --git a/src/mainboard/sunw/ultra40/mptable.c b/src/mainboard/sunw/ultra40/mptable.c index d4fdfc1..9f44048 100644 --- a/src/mainboard/sunw/ultra40/mptable.c +++ b/src/mainboard/sunw/ultra40/mptable.c @@ -34,27 +34,27 @@ extern unsigned sbdnb;
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; int i, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf();
mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev; + { + device_t dev; struct resource *res; uint32_t dword;
- dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_ck804_0, PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_ck804, 0x11, @@ -66,34 +66,34 @@ static void *smp_write_config_table(void *v) dword = 0x0120d218; pci_write_config32(dev, 0x7c, dword);
- dword = 0x12008a00; - pci_write_config32(dev, 0x80, dword); + dword = 0x12008a00; + pci_write_config32(dev, 0x80, dword);
dword = 0x00080d7d; - pci_write_config32(dev, 0x84, dword); + pci_write_config32(dev, 0x84, dword);
- } + }
- dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1)); - if (dev) { + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3,1)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, apicid_8131_1, 0x11, res2mmio(res, 0, 0)); } - } - dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1)); - if (dev) { + } + dev = dev_find_slot(bus_8131_0, PCI_DEVFN(sbdn3+1,1)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_0); if (res) { smp_write_ioapic(mc, apicid_8131_2, 0x11, res2mmio(res, 0, 0)); } - } + }
if(pci1234[2] & 0xf) { - dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_ck804b_0, PCI_DEVFN(sbdnb + 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_ck804b, 0x11, @@ -101,15 +101,15 @@ static void *smp_write_config_table(void *v) }
dword = 0x0000d218; - pci_write_config32(dev, 0x7c, dword); + pci_write_config32(dev, 0x7c, dword);
- dword = 0x00000000; - pci_write_config32(dev, 0x80, dword); + dword = 0x00000000; + pci_write_config32(dev, 0x80, dword);
- dword = 0x00000d00; - pci_write_config32(dev, 0x84, dword); + dword = 0x00000d00; + pci_write_config32(dev, 0x84, dword);
- } + } }
} @@ -117,73 +117,73 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, bus_isa, apicid_ck804, 1);
// Onboard ck804 smbus - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+1)<<2)|1, apicid_ck804, 0xa); // 10
// Onboard ck804 USB 1.1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|0, apicid_ck804, 0x15); // 21
// Onboard ck804 USB 2 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|1, apicid_ck804, 0x14); // 20 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+2)<<2)|1, apicid_ck804, 0x14); // 20
// Onboard ck804 Audio - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+4)<<2)|0, apicid_ck804, 0x14); // 20 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn+4)<<2)|0, apicid_ck804, 0x14); // 20
// Onboard ck804 SATA 0 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0, apicid_ck804, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +7)<<2)|0, apicid_ck804, 0x17); // 23
// Onboard ck804 SATA 1 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +8)<<2)|0, apicid_ck804, 0x16); // 22
// Onboard ck804 NIC - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +0x0a)<<2)|0, apicid_ck804, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_0, ((sbdn +0x0a)<<2)|0, apicid_ck804, 0x15); // 21
//Slot 1 PCIE x16 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00 << 2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_5, (0x00 << 2)|i, apicid_ck804, 0x10 + (2+i+4-sbdn%4)%4); + }
//Onboard Firewire - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x05 << 2)|0, apicid_ck804, 0x13); // 19 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x05 << 2)|0, apicid_ck804, 0x13); // 19
//Slot 2 PCI 32 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x04 << 2)|i, apicid_ck804, 0x10 + (0+i)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804_1, (0x04 << 2)|i, apicid_ck804, 0x10 + (0+i)%4); + }
if(pci1234[2] & 0xf) { //Onboard ck804b NIC - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_0, ((sbdnb+0x0a)<<2)|0, apicid_ck804b, 0x15);//24+4+4+21 = 53 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_0, ((sbdnb+0x0a)<<2)|0, apicid_ck804b, 0x15);//24+4+4+21 = 53
//Slot 3 PCIE x16 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_5, (0x00 << 2)|i, apicid_ck804b, 0x10 + (2+i+4-sbdnb%4)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_ck804b_5, (0x00 << 2)|i, apicid_ck804b, 0x10 + (2+i+4-sbdnb%4)%4); + } }
//Channel B of 8131
//Slot 4 PCI-X 100/66 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (4 << 2)|i, apicid_8131_2, (0+i)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (4 << 2)|i, apicid_8131_2, (0+i)%4); + }
//Slot 5 PCIX 100/66 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9 << 2)|i, apicid_8131_2, (1+i)%4); // 29 - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (9 << 2)|i, apicid_8131_2, (1+i)%4); // 29 + }
//OnBoard LSI SCSI - for(i = 0; i < 2; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6 << 2)|i, apicid_8131_2, (2+i)%4); //30 - } + for(i = 0; i < 2; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_2, (6 << 2)|i, apicid_8131_2, (2+i)%4); //30 + }
//Channel A of 8131
//Slot 6 PCIX 133/100/66 - for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4 << 2)|i, apicid_8131_1, (0+i)%4); //24 - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_8131_1, (4 << 2)|i, apicid_8131_1, (0+i)%4); //24 + }
/*Local Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN#*/ mptable_lintsrc(mc, bus_isa); diff --git a/src/mainboard/supermicro/h8dme/mptable.c b/src/mainboard/supermicro/h8dme/mptable.c index a76cf1b..23da4df 100644 --- a/src/mainboard/supermicro/h8dme/mptable.c +++ b/src/mainboard/supermicro/h8dme/mptable.c @@ -30,15 +30,15 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; unsigned sbdn; int i, j, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf(); sbdn = sysconf.sbdn; @@ -46,13 +46,13 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev; + { + device_t dev; struct resource *res; uint32_t dword;
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_mcp55, 0x11, @@ -62,13 +62,13 @@ static void *smp_write_config_table(void *v) dword = 0x43c6c643; pci_write_config32(dev, 0x7c, dword);
- dword = 0x81001a00; - pci_write_config32(dev, 0x80, dword); + dword = 0x81001a00; + pci_write_config32(dev, 0x80, dword);
dword = 0xd00012d2; - pci_write_config32(dev, 0x84, dword); + pci_write_config32(dev, 0x84, dword);
- } + }
@@ -76,31 +76,31 @@ static void *smp_write_config_table(void *v)
mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+1)<<2)|1, apicid_mcp55, 0xa); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+1)<<2)|1, apicid_mcp55, 0xa);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|0, apicid_mcp55, 0x16); // 22 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|0, apicid_mcp55, 0x16); // 22
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|1, apicid_mcp55, 0x17); // 23
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+6)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+6)<<2)|1, apicid_mcp55, 0x17); // 23
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|0, apicid_mcp55, 0x14); // 20 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|1, apicid_mcp55, 0x17); // 23 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|2, apicid_mcp55, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|0, apicid_mcp55, 0x14); // 20 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|2, apicid_mcp55, 0x15); // 21
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+8)<<2)|0, apicid_mcp55, 0x16); // 22 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+9)<<2)|0, apicid_mcp55, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+8)<<2)|0, apicid_mcp55, 0x16); // 22 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+9)<<2)|0, apicid_mcp55, 0x15); // 21
for(j = 7; j >= 2; j--) { if(!bus_mcp55[j]) continue; for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00 << 2)|i, apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4); - } + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00 << 2)|i, apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4); + } }
- for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], (0x04 << 2)|i, apicid_mcp55, 0x10 + (0+i)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], (0x04 << 2)|i, apicid_mcp55, 0x10 + (0+i)%4); + }
if(bus_pcix[0]) { diff --git a/src/mainboard/supermicro/h8dmr/mptable.c b/src/mainboard/supermicro/h8dmr/mptable.c index 7ca1091..44e5571 100644 --- a/src/mainboard/supermicro/h8dmr/mptable.c +++ b/src/mainboard/supermicro/h8dmr/mptable.c @@ -30,15 +30,15 @@ extern unsigned char bus_pcix[3]; // under bus_mcp55_2
static void *smp_write_config_table(void *v) { - struct mp_config_table *mc; + struct mp_config_table *mc; unsigned sbdn; int i, j, bus_isa;
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN); + mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
mptable_init(mc, LOCAL_APIC_ADDR);
- smp_write_processors(mc); + smp_write_processors(mc);
get_bus_conf(); sbdn = sysconf.sbdn; @@ -46,13 +46,13 @@ static void *smp_write_config_table(void *v) mptable_write_buses(mc, NULL, &bus_isa);
/*I/O APICs: APIC ID Version State Address*/ - { - device_t dev; + { + device_t dev; struct resource *res; uint32_t dword;
- dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); - if (dev) { + dev = dev_find_slot(bus_mcp55[0], PCI_DEVFN(sbdn+ 0x1,0)); + if (dev) { res = find_resource(dev, PCI_BASE_ADDRESS_1); if (res) { smp_write_ioapic(mc, apicid_mcp55, 0x11, @@ -62,13 +62,13 @@ static void *smp_write_config_table(void *v) dword = 0x43c6c643; pci_write_config32(dev, 0x7c, dword);
- dword = 0x81001a00; - pci_write_config32(dev, 0x80, dword); + dword = 0x81001a00; + pci_write_config32(dev, 0x80, dword);
dword = 0xd00012d2; - pci_write_config32(dev, 0x84, dword); + pci_write_config32(dev, 0x84, dword);
- } + }
@@ -77,31 +77,31 @@ static void *smp_write_config_table(void *v) mptable_add_isa_interrupts(mc, bus_isa, apicid_mcp55, 0);
/*I/O Ints: Type Polarity Trigger Bus ID IRQ APIC ID PIN# */ - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+1)<<2)|1, apicid_mcp55, 0xa); + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+1)<<2)|1, apicid_mcp55, 0xa);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|0, apicid_mcp55, 0x16); // 22 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|0, apicid_mcp55, 0x16); // 22
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+2)<<2)|1, apicid_mcp55, 0x17); // 23
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+6)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+6)<<2)|1, apicid_mcp55, 0x17); // 23
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|0, apicid_mcp55, 0x14); // 20 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|1, apicid_mcp55, 0x17); // 23 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|2, apicid_mcp55, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|0, apicid_mcp55, 0x14); // 20 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|1, apicid_mcp55, 0x17); // 23 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+5)<<2)|2, apicid_mcp55, 0x15); // 21
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+8)<<2)|0, apicid_mcp55, 0x16); // 22 - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+9)<<2)|0, apicid_mcp55, 0x15); // 21 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+8)<<2)|0, apicid_mcp55, 0x16); // 22 + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[0], ((sbdn+9)<<2)|0, apicid_mcp55, 0x15); // 21
for(j = 7; j >= 2; j--) { if(!bus_mcp55[j]) continue; for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00 << 2)|i, apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4); - } + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[j], (0x00 << 2)|i, apicid_mcp55, 0x10 + (2+j+i+4-sbdn%4)%4); + } }
- for(i = 0; i < 4; i++) { - smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], (0x04 << 2)|i, apicid_mcp55, 0x10 + (0+i)%4); - } + for(i = 0; i < 4; i++) { + smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, bus_mcp55[1], (0x04 << 2)|i, apicid_mcp55, 0x10 + (0+i)%4); + }
if(bus_pcix[0]) {
-
HAOUAS Elyes