Change in coreboot[master]: soc/intel/common: Move CSE Lite driver functionality into romstage
Sridhar Siricilla has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/48279 )
Change subject: soc/intel/common: Move CSE Lite driver functionality into romstage ......................................................................
Patch Set 4:
(2 comments)
https://review.coreboot.org/c/coreboot/+/48279/2//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/48279/2//COMMIT_MSG@10 PS2, Line 10: triggeres
triggers
Ack
https://review.coreboot.org/c/coreboot/+/48279/2//COMMIT_MSG@13 PS2, Line 13: Verified on JSL and TGL platforms
For bookkeeping: did you check how much boot time is saved because of the reset being done earlier?
Plan is to measure delta time between from romstage(after DRAM init) to ramstage(existing code location) when CSE boots from RO on cold reset. This delta will be boot improvement time. I will have latest numbers tomorrow.
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Sridhar Siricilla (Code Review)