Vladimir Serbinenko (phcoder@gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13623
-gerrit
commit db5e3e7313f2d59d7b872850e789cd8bf04a352c Author: Vladimir Serbinenko phcoder@gmail.com Date: Mon Feb 8 00:09:55 2016 +0100
ASL: Use temporary variable when storing register into itself.
Otherwise it triggers a IASL warning with new IASL.
Change-Id: I090ee18df78ea779137ee6797c55b96ea27e6d27 Signed-off-by: Vladimir Serbinenko phcoder@gmail.com --- src/mainboard/amd/dinar/dsdt.asl | 3 ++- src/mainboard/amd/torpedo/dsdt.asl | 3 ++- src/mainboard/hp/dl145_g1/dsdt.asl | 15 ++++++++++----- 3 files changed, 14 insertions(+), 7 deletions(-)
diff --git a/src/mainboard/amd/dinar/dsdt.asl b/src/mainboard/amd/dinar/dsdt.asl index c5dacef..2c2ae76 100644 --- a/src/mainboard/amd/dinar/dsdt.asl +++ b/src/mainboard/amd/dinar/dsdt.asl @@ -802,7 +802,8 @@ DefinitionBlock ( }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PEWS, PEWS) + Store(PEWS, Local0) + Store(Local0, PEWS)
/* if(DeRefOf(Index(WKST,0))) { * Store(0, Index(WKST,1)) diff --git a/src/mainboard/amd/torpedo/dsdt.asl b/src/mainboard/amd/torpedo/dsdt.asl index 8926966..2014a91 100644 --- a/src/mainboard/amd/torpedo/dsdt.asl +++ b/src/mainboard/amd/torpedo/dsdt.asl @@ -774,7 +774,8 @@ DefinitionBlock ( }
/* Arbitrarily clear PciExpWakeStatus */ - Store(PEWS, PEWS) + Store(PEWS, Local0) + Store(Local0, PEWS)
/* if(DeRefOf(Index(WKST,0))) { * Store(0, Index(WKST,1)) diff --git a/src/mainboard/hp/dl145_g1/dsdt.asl b/src/mainboard/hp/dl145_g1/dsdt.asl index 52a8784..9e131b5 100644 --- a/src/mainboard/hp/dl145_g1/dsdt.asl +++ b/src/mainboard/hp/dl145_g1/dsdt.asl @@ -250,11 +250,16 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "LXBIOS", "LXB-DSDT", 1) Notify (_SB.PWRB, 0x02) } } - Store (_SB.PCI0.GSTS, _SB.PCI0.GSTS) - Store (_SB.PCI0.STMC, _SB.PCI0.STMC) - Store (_SB.PCI0.STC0, _SB.PCI0.STC0) - Store (_SB.PCI0.STC1, _SB.PCI0.STC1) - Store (_SB.PCI0.STHW, _SB.PCI0.STHW) + Store (_SB.PCI0.GSTS, Local0) + Store (Local0, _SB.PCI0.GSTS) + Store (_SB.PCI0.STMC, Local0) + Store (Local0, _SB.PCI0.STMC) + Store (_SB.PCI0.STC0, Local0) + Store (Local0, _SB.PCI0.STC0) + Store (_SB.PCI0.STC1, Local0) + Store (Local0, _SB.PCI0.STC1) + Store (_SB.PCI0.STHW, Local0) + Store (Local0, _SB.PCI0.STHW) If (LEqual (Arg0, 0x03)) { // Wake from S3 state Notify (_SB.PCI0.TP2P.USB0, 0x01) }