Change in coreboot[master]: google/kahlee: Update for single DIMM

[Marc Jones (Code Review)]

Marc Jones has uploaded a new change for review. ( https://review.coreboot.org/19833 )

Change subject: google/kahlee: Update for single DIMM
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google/kahlee: Update for single DIMM

Update for a single DIMM with an SPD at address A0.

Change-Id: I646f079c99cbaffd7094773243600c3030308325
Signed-off-by: Marc Jones 
---
M src/mainboard/google/kahlee/OemCustomize.c
M src/mainboard/google/kahlee/devicetree.cb
2 files changed, 3 insertions(+), 3 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/19833/1

diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c
index 5f9f501..99d0594 100644
--- a/src/mainboard/google/kahlee/OemCustomize.c
+++ b/src/mainboard/google/kahlee/OemCustomize.c
@@ -152,7 +152,7 @@

static const PSO_ENTRY DDR4PlatformMemoryConfiguration[] = {
    DRAM_TECHNOLOGY(ANY_SOCKET, DDR4_TECHNOLOGY),
-	NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 2),
+	NUMBER_OF_DIMMS_SUPPORTED (ANY_SOCKET, ANY_CHANNEL, 1),
    NUMBER_OF_CHANNELS_SUPPORTED (ANY_SOCKET, 2),
    MOTHER_BOARD_LAYERS (LAYERS_6),
    MEMCLK_DIS_MAP (ANY_SOCKET, ANY_CHANNEL, 0xff, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00),
diff --git a/src/mainboard/google/kahlee/devicetree.cb b/src/mainboard/google/kahlee/devicetree.cb
index bb672b2..2d2fe3f 100644
--- a/src/mainboard/google/kahlee/devicetree.cb
+++ b/src/mainboard/google/kahlee/devicetree.cb
@@ -16,7 +16,7 @@

register "spdAddrLookup" = "
    {
-		{ {0xA2, 0x00} }, // socket 0 - Channel 0, slots 0 & 1
+		{ {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0
    }"

device cpu_cluster 0 on
@@ -41,7 +41,7 @@
    	device pci 12.0 on  end # EHCI
    	device pci 14.0 on      # SM
    		chip drivers/generic/generic # dimm 0-0-0
-				device i2c 51 on end
+				device i2c 50 on end
    		end
    	end # SM
    	device pci 14.3 on  end # LPC	0x790e