Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/55236 )
Change subject: mb/google/poppy: Do not let FSP-S init UART 0 ......................................................................
mb/google/poppy: Do not let FSP-S init UART 0
FSP-S configures the GPIOs for enabled SerialIO devices. However, Poppy boards only enable UART 0 because it's function 0 of PCI device 30, and the PCI specification requires that function 0 of multifunction devices be implemented if other functions are implemented as well.
Nautilus got remedied in commit 8a1f095e50e068e42d378f47c79467e7b6295b7b (mb/google/poppy/variants/nautilus: Update camera power enable GPIOs) by using `PchSerialIoSkipInit` for UART 0, which tells FSP to not touch the SerialIO device. This way, it remains enabled and the GPIO settings will not be overwritten by FSP.
However, not all variants do this, but use some UART 0 pads as GPIOs. To prevent any issues, configure UART 0 as `PchSerialIoSkipInit` on all the variants.
Change-Id: I7e3a61769ef9e3b348ce84c663f67d3c4c5d9485 Signed-off-by: Angel Pons th3fanbus@gmail.com --- M src/mainboard/google/poppy/variants/baseboard/devicetree.cb M src/mainboard/google/poppy/variants/nami/devicetree.cb M src/mainboard/google/poppy/variants/rammus/devicetree.cb M src/mainboard/google/poppy/variants/soraka/devicetree.cb 4 files changed, 4 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/55236/1
diff --git a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb index c5d8539..ebf61e3 100644 --- a/src/mainboard/google/poppy/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/poppy/variants/baseboard/devicetree.cb @@ -238,7 +238,7 @@ [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoDisabled, [PchSerialIoIndexSpi1] = PchSerialIoDisabled, - [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoSkipInit, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" diff --git a/src/mainboard/google/poppy/variants/nami/devicetree.cb b/src/mainboard/google/poppy/variants/nami/devicetree.cb index 885fcbd..193d0fc 100644 --- a/src/mainboard/google/poppy/variants/nami/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nami/devicetree.cb @@ -258,7 +258,7 @@ [PchSerialIoIndexI2C5] = PchSerialIoDisabled, [PchSerialIoIndexSpi0] = PchSerialIoPci, [PchSerialIoIndexSpi1] = PchSerialIoPci, - [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoSkipInit, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" diff --git a/src/mainboard/google/poppy/variants/rammus/devicetree.cb b/src/mainboard/google/poppy/variants/rammus/devicetree.cb index 4ea4740..da04547 100644 --- a/src/mainboard/google/poppy/variants/rammus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/rammus/devicetree.cb @@ -219,7 +219,7 @@ [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoPci, [PchSerialIoIndexSpi1] = PchSerialIoDisabled, - [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoSkipInit, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" diff --git a/src/mainboard/google/poppy/variants/soraka/devicetree.cb b/src/mainboard/google/poppy/variants/soraka/devicetree.cb index df571aa..49ecb49 100644 --- a/src/mainboard/google/poppy/variants/soraka/devicetree.cb +++ b/src/mainboard/google/poppy/variants/soraka/devicetree.cb @@ -239,7 +239,7 @@ [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoDisabled, [PchSerialIoIndexSpi1] = PchSerialIoDisabled, - [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoSkipInit, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }"
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Angel Pons (Code Review)