Attention is currently required from: Reka Norman, Eric Lai. Tim Wawrzynczak has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63562 )
Change subject: mb/google/brya/baseboard/nissa: Configure I2C lcnt and hcnt ......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/63562/comment/01792f1b_4f2f320e PS2, Line 9: Configure lcnt and hcnt directly to give the required frequency, tHIGH
When the ODM measured the frequencies they varied from about 387 to 399 on the different buses, but […]
Great point Eric, it's good to remember there are tolerances everywhere (AP clock jitter, board-specific resistor tolerances, board layout, and on the peripheral side too, it has tolerances in its clock, etc.,), so aiming for 390 give you 2.5% margin without going over 400 kHz and potentially causing issues later on.
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Tim Wawrzynczak (Code Review)