Change in coreboot[master]: soc/intel/common: Enable rom cache on all CPU threads

[Arthur Heymans (Code Review)]

Attention is currently required from: Arthur Heymans, Subrata Banik, Kane Chen.
Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/63486 )

Change subject: soc/intel/common: Enable rom cache on all CPU threads
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Patch Set 3:

(1 comment)

Patchset:

PS2:
> > > > ah yes, thanks for capturing this.
> > > > i miss this.
> > > > it only restores BSP MTRR.
> > >
> > > @Arthur, can you please comment reg CB:63498
> >
> > With TXT APs are shut down along the way and not started up again. I know it's a different problem that also needs a solution, but that approach would break it.
>
> oops I was not aware of that.
> > What do you think of my suggestion to add a nop call on APs, to be sure they finished setting up MTRRs and don't override that temp one. Then the temp MTRR is only set on the BSP?
>
> this would work bt isn't MTRR is shared between logical processors belongs to a core.

Is it so bad that one AP also has the temp MTRR? when the BSP removes that temp MTRR that would also be resolved.
> > I generally like to avoid keeping track of the state of APs.
>
> yeah, that would be complicated.