Change in coreboot[master]: mb/siemens/mc_ehl1: Adjust PCIe clock settings in devicetree

[Werner Zeh (Code Review)]

Attention is currently required from: Mario Scheithauer.
Werner Zeh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/58740 )

Change subject: mb/siemens/mc_ehl1: Adjust PCIe clock settings in devicetree
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Patch Set 3:

(1 comment)

Commit Message:

https://review.coreboot.org/c/coreboot/+/58740/comment/4b3377e2_a5130ed5 
PS3, Line 18: and
> on?

No, 'and' is what I really mean here. These are two features: CLKREQ in terms of Clock-Request via the dedicated pin where the PCIe clock can be switched off when not needed and the CLK-Output itself where the PCIe clock is driven from the chipset and unused clock outputs are disabled.