Change in coreboot[master]: vendorcode/amd/fsp/picasso: Platform descriptors should use fixed wid...
Matt Papageorge has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vendorcode/amd/fsp/picasso: Platform descriptors should use fixed width fields ......................................................................
vendorcode/amd/fsp/picasso: Platform descriptors should use fixed width fields
PCIe platform descriptors passed to Picasso FSP should use fixed width fields.
BUG=b:153681134 TEST=Boot system and suspend/resume. All PCIe devices train succesfully.
Signed-off-by: Matt Papageorge matt.papageorge@amd.corp-partner.google.com Change-Id: If2a34be895db2c19c8830f5888cb99e43ad21b73 --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 19 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/42519/1
diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index 8a70194..c2d13b0 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -115,27 +115,27 @@ uint8_t start_lane; // Start lane of the pci device uint8_t end_lane; // End lane of the pci device uint8_t gpio_group_id; // FCH reset number. 0 is global reset - unsigned int port_present :1; // Should be TRUE if train link - unsigned int reserved_3 :7; - unsigned int device_number :5; // Desired root port device number - unsigned int function_number :3; // Desired root port function number - unsigned int link_speed_capability :2; - unsigned int auto_spd_change :2; - unsigned int eq_preset :4; - unsigned int link_aspm :2; - unsigned int link_aspm_L1_1 :1; - unsigned int link_aspm_L1_2 :1; - unsigned int clk_req :4; + uint32_t port_present:1; // Should be TRUE if train link + uint32_t reserved_3:7; + uint32_t device_number:5; // Desired root port device number + uint32_t function_number:3; // Desired root port function number + uint32_t link_speed_capability:2; + uint32_t auto_spd_change:2; + uint32_t eq_preset:4; + uint32_t link_aspm:2; + uint32_t link_aspm_L1_1:1; + uint32_t link_aspm_L1_2:1; + uint32_t clk_req:4; uint8_t link_hotplug; uint8_t slot_power_limit; - unsigned int slot_power_limit_scale :2; - unsigned int reserved_4 :6; - unsigned int link_compliance_mode :1; - unsigned int link_safe_mode :1; - unsigned int sb_link :1; - unsigned int clk_pm_support :1; - unsigned int channel_type :3; - unsigned int turn_off_unused_lanes :1; + uint32_t slot_power_limit_scale:2; + uint32_t reserved_4:6; + uint32_t link_compliance_mode:1; + uint32_t link_safe_mode:1; + uint32_t sb_link:1; + uint32_t clk_pm_support:1; + uint32_t channel_type:3; + uint32_t turn_off_unused_lanes:1; uint8_t reserved[4]; } fsp_pcie_descriptor;
Matt Papageorge has uploaded a new patch set (#2). ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors
PCIe platform descriptors passed to Picasso FSP should use fixed width fields.
BUG=b:153681134 TEST=Boot system and suspend/resume. All PCIe devices train succesfully.
Signed-off-by: Matt Papageorge matt.papageorge@amd.corp-partner.google.com Change-Id: If2a34be895db2c19c8830f5888cb99e43ad21b73 --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 19 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/42519/2
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42519
to look at the new patch set (#3).
Change subject: vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors
PCIe platform descriptors passed to Picasso FSP should use fixed width fields.
BUG=b:153681134 TEST=Boot system and suspend/resume. All PCIe devices train succesfully.
Signed-off-by: Matt Papageorge matt.papageorge@amd.corp-partner.google.com Change-Id: If2a34be895db2c19c8830f5888cb99e43ad21b73 --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 19 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/42519/3
Matt Papageorge has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
Patch Set 3: Code-Review+1
Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
Patch Set 3: Code-Review+2
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vendorcode/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/42519/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42519/3//COMMIT_MSG@7 PS3, Line 7: vendorcode You'll frequently see this as "vc" in an effort to shorten the subject line.
In fact for me, Gerrit's wrapping the subject line on the main page. I'd recommend shortening it up.
Hello build bot (Jenkins), Furquan Shaikh, Marshall Dawson, Aaron Durbin, Felix Held,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/42519
to look at the new patch set (#4).
Change subject: vc/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
vc/amd/fsp/picasso: Use fixed width fields for platform descriptors
PCIe platform descriptors passed to Picasso FSP should use fixed width fields.
BUG=b:153681134 TEST=Boot system and suspend/resume. All PCIe devices train succesfully.
Signed-off-by: Matt Papageorge matt.papageorge@amd.corp-partner.google.com Change-Id: If2a34be895db2c19c8830f5888cb99e43ad21b73 --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 19 insertions(+), 19 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/42519/4
Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vc/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
Patch Set 4: Code-Review+2
(1 comment)
https://review.coreboot.org/c/coreboot/+/42519/3//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/42519/3//COMMIT_MSG@7 PS3, Line 7: vendorcode
You'll frequently see this as "vc" in an effort to shorten the subject line. […]
Done
Marshall Dawson has submitted this change. ( https://review.coreboot.org/c/coreboot/+/42519 )
Change subject: vc/amd/fsp/picasso: Use fixed width fields for platform descriptors ......................................................................
vc/amd/fsp/picasso: Use fixed width fields for platform descriptors
PCIe platform descriptors passed to Picasso FSP should use fixed width fields.
BUG=b:153681134 TEST=Boot system and suspend/resume. All PCIe devices train succesfully.
Signed-off-by: Matt Papageorge matt.papageorge@amd.corp-partner.google.com Change-Id: If2a34be895db2c19c8830f5888cb99e43ad21b73 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42519 Reviewed-by: Marshall Dawson marshalldawson3rd@gmail.com Reviewed-by: Matt Papageorge matthewpapa07@gmail.com Reviewed-by: Felix Held felix-coreboot@felixheld.de Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/vendorcode/amd/fsp/picasso/platform_descriptors.h 1 file changed, 19 insertions(+), 19 deletions(-)
Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved Marshall Dawson: Looks good to me, approved Matt Papageorge: Looks good to me, but someone else must approve
diff --git a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h index 8a70194..cae5d45 100644 --- a/src/vendorcode/amd/fsp/picasso/platform_descriptors.h +++ b/src/vendorcode/amd/fsp/picasso/platform_descriptors.h @@ -115,27 +115,27 @@ uint8_t start_lane; // Start lane of the pci device uint8_t end_lane; // End lane of the pci device uint8_t gpio_group_id; // FCH reset number. 0 is global reset - unsigned int port_present :1; // Should be TRUE if train link - unsigned int reserved_3 :7; - unsigned int device_number :5; // Desired root port device number - unsigned int function_number :3; // Desired root port function number - unsigned int link_speed_capability :2; - unsigned int auto_spd_change :2; - unsigned int eq_preset :4; - unsigned int link_aspm :2; - unsigned int link_aspm_L1_1 :1; - unsigned int link_aspm_L1_2 :1; - unsigned int clk_req :4; + uint32_t port_present :1; // Should be TRUE if train link + uint32_t reserved_3 :7; + uint32_t device_number :5; // Desired root port device number + uint32_t function_number :3; // Desired root port function number + uint32_t link_speed_capability :2; + uint32_t auto_spd_change :2; + uint32_t eq_preset :4; + uint32_t link_aspm :2; + uint32_t link_aspm_L1_1 :1; + uint32_t link_aspm_L1_2 :1; + uint32_t clk_req :4; uint8_t link_hotplug; uint8_t slot_power_limit; - unsigned int slot_power_limit_scale :2; - unsigned int reserved_4 :6; - unsigned int link_compliance_mode :1; - unsigned int link_safe_mode :1; - unsigned int sb_link :1; - unsigned int clk_pm_support :1; - unsigned int channel_type :3; - unsigned int turn_off_unused_lanes :1; + uint32_t slot_power_limit_scale :2; + uint32_t reserved_4 :6; + uint32_t link_compliance_mode :1; + uint32_t link_safe_mode :1; + uint32_t sb_link :1; + uint32_t clk_pm_support :1; + uint32_t channel_type :3; + uint32_t turn_off_unused_lanes :1; uint8_t reserved[4]; } fsp_pcie_descriptor;
-
Felix Held (Code Review) -
Marshall Dawson (Code Review)
-
Matt Papageorge (Code Review)